Specifications

CY8C24123A
CY8C24223A
CY8C24423A
Document Number: 38-12028 Rev. *V Page 11 of 71
20-Pin Part Pinout
Table 3. 20-Pin PDIP, SSOP, and SOIC
Pin
No.
Type
Pin
Name
Description
Figure 5. CY8C24223A 20-Pin PSoC Device
Digital Analog
1 I/O I P0[7] Analog column mux input
2 I/O I/O P0[5] Analog column mux input and column output
3 I/O I/O P0[3] Analog column mux input and column output
4 I/O I P0[1] Analog column mux input
5 Power SMP SMP connection to external components
required
6 I/O P1[7] I
2
C SCL
7 I/O P1[5] I
2
C SDA
8 I/O P1[3]
9 I/O P1[1] XTALin, I
2
C SCL, ISSP-SCLK
[5]
10 Power V
SS
Ground connection.
11 I/O P1[0] XTALout, I
2
C SDA, ISSP-SDATA
[5]
12 I/O P1[2]
13 I/O P1[4] Optional external clock input (EXTCLK)
14 I/O P1[6]
15 Input XRES Active high external reset with internal
pull-down
16 I/O I P0[0] Analog column mux input
17 I/O I P0[2] Analog column mux input
18 I/O I P0[4] Analog column mux input
19 I/O I P0[6] Analog column mux input
20 Power V
DD
Supply voltage
LEGEND: A = Analog, I = Input, and O = Output.
A, I, P0[7]
A, IO, P0[5]
A, IO, P0[3]
A, I, P0[1]
SMP
I2C SCL, P1[7]
I2C SDA, P1[5]
P1[3]
I2C SCL, XTALin, P1[1]
V
SS
PDIP
SSOP
SOIC
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
V
DD
P0[6], A, I
P0[4], A, I
P0[2], A, I
P0[0], A, I
XRES
P1[6]
P1[4], EXTCLK
P1[2]
P1[0], XTALout,
I2C SDA
Note
5. These are the ISSP pins, which are not high Z at POR. See the PSoC Technical Reference Manual for details.