Specifications

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CY8C24123A

CY8C24223A

CY8C24423A

PSoC

Programmable System-on-Chip

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

Document Number: 38-12028 Rev. *V Revised January 13, 2015

PSoC

Programmable System-on-Chip

Features

■ Powerful Harvard-architecture processor

❐ M8C processor speeds up to 24 MHz

❐ 8 × 8 multiply, 32-bit accumulate

❐ Low power at high speed

❐ Operating voltage: 2.4 V to 5.25 V

❐ Operating voltages down to 1.0 V using on-chip switch mode

pump (SMP)

❐ Industrial temperature range: –40 °C to +85 °C

■ Advanced peripherals (PSoC

blocks)

❐ Six rail-to-rail analog PSoC blocks provide:

• Up to 14-bit analog-to-digital converters (ADCs)

• Up to 9-bit digital-to-analog converters (DACs)

• Programmable gain amplifiers (PGAs)

• Programmable filters and comparators

❐ Four digital PSoC blocks provide:

• 8- to 32-bit timers and counters, 8- and 16-bit pulse-width

modulators (PWMs)

• Cyclical redundancy check (CRC) and pseudo random

sequence (PRS) modules

• Full-duplex universal asynchronous receiver transmitter

(UART)

• Multiple serial peripheral interface (SPI) masters or slaves

• Can connect to all general-purpose I/O (GPIO) pins

❐ Complex peripherals by combining blocks

■ Precision, programmable clocking

❐ Internal ±5% 24- / 48-MHz main oscillator

❐ High accuracy 24 MHz with optional 32 kHz crystal and

phase-locked loop (PLL)

❐ Optional external oscillator up to 24 MHz

❐ Internal oscillator for watchdog and sleep

■ Flexible on-chip memory

❐ 4 KB flash program storage 50,000 erase/write cycles

❐ 256-bytes SRAM data storage

❐ In-system serial programming (ISSP)

❐ Partial flash updates

❐ Flexible protection modes

❐ Electronically erasable programmable read only memory

(EEPROM) emulation in flash

■ Programmable pin configurations

❐ 25-mA sink, 10-mA source on all GPIOs

❐ Pull-up, pull-down, high Z, strong, or open-drain drive modes

on all GPIOs

❐ Eight standard analog inputs on all GPIOs, and

four additional analog inputs with restricted routing

❐ Two 30 mA analog outputs on all GPIOs

❐ Configurable interrupt on all GPIOs

■ New CY8C24x23A PSoC device

❐ Derived from the CY8C24x23 device

❐ Low power and low voltage (2.4 V)

■ Additional system resources

❐ I

C slave, master, and multi-master to 400 kHz

❐ Watchdog and sleep timers

❐ User-configurable low-voltage detection (LVD)

❐ Integrated supervisory circuit

❐ On-chip precision voltage reference

■ Complete development tools

❐ Free development software (PSoC Designer™)

❐ Full-featured, in-circuit emulator (ICE), and programmer

❐ Full-speed emulation

❐ Complex breakpoint structure

❐ 128 KB trace memory

DIGITAL SYSTEM

SRAM

256 Bytes

Interrupt

Controller

Sleep and

Watchdog

Multiple Clock Sources

(Includes IMO, ILO, PLL, and ECO)

Global Digital Interconnect

Global Analog Interconnect

PSoC CORE

CPU Core (M8C)

SROM Flash 4KB

Digital

Block

Array

Multiply

Accum.

Switch

Mode

Pump

Internal

Voltage

Ref.

Digital

Clocks

POR and LVD

System Resets

Decimator

SYSTEM RESOURCES

ANALOG SYSTEM

Analog

Ref

Analog

Input

Muxing

Port 2 Port 1 Port 0

Analog

Drivers

System Bus

Analog

Block

Array

Logic Block Diagram

Errata: For information on silicon errata, see “Errata” on page 67. Details include trigger conditions, devices affected, and proposed workaround.

Summary of content (71 pages)

PAGE 1
CY8C24123A CY8C24223A CY8C24423A PSoC® Programmable System-on-Chip PSoC® Programmable System-on-Chip Features ■ ■ ■ ■ ■ Powerful Harvard-architecture processor ❐ M8C processor speeds up to 24 MHz ❐ 8 × 8 multiply, 32-bit accumulate ❐ Low power at high speed ❐ Operating voltage: 2.4 V to 5.25 V ❐ Operating voltages down to 1.
PAGE 2
CY8C24123A CY8C24223A CY8C24423A More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right PSoC device for your design, and to help you to quickly and effectively integrate the device into your design. Following is an abbreviated list for PSoC 1: ■ ■ ■ ■ ■ Overview: PSoC Portfolio, PSoC Roadmap Product Selectors: PSoC 1, PSoC 3, PSoC 4, or PSoC 5LP In addition, PSoC Designer offers a device selection tool within PSoC 1, at the time of creating a new project.
PAGE 3
CY8C24123A CY8C24223A CY8C24423A Contents PSoC Functional Overview .............................................. 3 PSoC Core .................................................................. 3 Digital System ............................................................. 3 Analog System ............................................................ 4 Additional System Resources ..................................... 5 PSoC Device Characteristics ...................................... 5 Getting Started ........
PAGE 4
CY8C24123A CY8C24223A CY8C24423A The PSoC family consists of many programmable system-on-chips with on-chip controller devices. These devices are designed to replace multiple traditional MCU-based system components with a low-cost single-chip programmable device. PSoC devices include configurable blocks of analog and digital logic, and programmable interconnects.
PAGE 5
CY8C24123A CY8C24223A CY8C24423A The analog system consists of six configurable blocks, each consisting of an opamp circuit that allows the creation of complex analog signal flows. Analog peripherals are very flexible and can be customized to support specific application requirements. Some of the more common PSoC analog functions (most available as user modules) are: ■ ■ ADCs (up to two, with 6- to 14-bit resolution, selectable as incremental, delta sigma, and SAR) Figure 3.
PAGE 6
CY8C24123A CY8C24223A CY8C24423A Additional System Resources System resources, some of which are listed in the previous sections, provide additional capability useful to complete systems. Additional resources include a multiplier, decimator, switch-mode pump, low-voltage detection, and power-on-reset (POR). Statements describing the merits of each system resource follow: ■ Digital clock dividers provide three customizable clock frequencies for use in applications.
PAGE 7
CY8C24123A CY8C24223A CY8C24423A Getting Started covers a wide variety of topics and skill levels to assist you in your designs. For in depth information, along with detailed programming details, see the PSoC® Technical Reference Manual. CYPros Consultants For up-to-date ordering, packaging, and electrical specification information, see the latest PSoC device datasheets on the web. Certified PSoC Consultants offer everything from technical assistance to completed PSoC designs.
PAGE 8
CY8C24123A CY8C24223A CY8C24423A Development Tools PSoC Designer™ is the revolutionary integrated design environment (IDE) that you can use to customize PSoC to meet your specific application requirements. PSoC Designer software accelerates system design and time to market. Develop your applications using a library of precharacterized analog and digital peripherals (called user modules) in a drag-and-drop design environment.
PAGE 9
CY8C24123A CY8C24223A CY8C24423A Designing with PSoC Designer The development process for the PSoC device differs from that of a traditional fixed-function microprocessor. The configurable analog and digital hardware blocks give the PSoC architecture a unique flexibility that pays dividends in managing specification change during development and lowering inventory costs. These configurable resources, called PSoC blocks, have the ability to implement a wide variety of user-selectable functions.
PAGE 10
CY8C24123A CY8C24223A CY8C24423A Pinouts This section describes, lists, and illustrates the CY8C24x23A PSoC device pins and pinout configurations. Every port pin (labeled with a “P”) is capable of digital I/O. However, VSS, VDD, SMP, and XRES are not capable of digital I/O. 8-Pin Part Pinout Table 2. 8-Pin PDIP and SOIC Pin No.
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CY8C24123A CY8C24223A CY8C24423A 20-Pin Part Pinout Table 3. 20-Pin PDIP, SSOP, and SOIC Pin No.
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CY8C24123A CY8C24223A CY8C24423A 28-Pin Part Pinout Table 4. 28-Pin PDIP, SSOP, and SOIC Pin No.
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CY8C24123A CY8C24223A CY8C24423A 32-Pin Part Pinout Table 5.
PAGE 14
CY8C24123A CY8C24223A CY8C24423A 56-Pin Part Pinout The 56-pin SSOP part is for the CY8C24000A On-Chip Debug (OCD) PSoC device. Note This part is only used for in-circuit debugging. It is NOT available for production. Table 6. 56-Pin SSOP OCD Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Type Digital Analog I/O I/O I/O I/O I/O I/O I/O I/O I I I I OCD OCD Power I I Pin Name NC P0[7] P0[5] P0[3] P0[1] P2[7] P2[5] P2[3] P2[1] NC NC NC NC OCDE OCDO SMP Description No connection.
PAGE 15
CY8C24123A CY8C24223A CY8C24423A Register Reference This section lists the registers of the CY8C24x23A PSoC device. For detailed register information, see the PSoC Programmable Sytem-on-Chip Reference Manual. Register Conventions Register Mapping Tables Abbreviations Used The PSoC device has a total register address space of 512 bytes. The register space is referred to as I/O space and is divided into two banks, Bank 0 and Bank 1.
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CY8C24123A CY8C24223A CY8C24423A Table 8.
PAGE 17
CY8C24123A CY8C24223A CY8C24423A Table 0-1.
PAGE 18
CY8C24123A CY8C24223A CY8C24423A Electrical Specifications This section presents the DC and AC electrical specifications of the CY8C24x23A PSoC device. For the latest electrical specifications, check if you have the most recent datasheet by visiting the website at http://www.cypress.com. Specifications are valid for –40 °C  TA  85 °C and TJ  100 °C, except where noted. Refer to Table 29 on page 37 for the electrical specifications for the IMO using SLIMO mode. Figure 9.
PAGE 19
CY8C24123A CY8C24223A CY8C24423A Operating Temperature Table 10. Operating Temperature Symbol Description TA Ambient temperature TJ Junction temperature Min –40 –40 Typ – – Max +85 +100 Units Notes °C °C The temperature rise from ambient to junction is package specific. See Table 48 on page 57.
PAGE 20
CY8C24123A CY8C24223A CY8C24423A DC GPIO Specifications The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Table 12. 5-V and 3.
PAGE 21
CY8C24123A CY8C24223A CY8C24423A DC Operational Amplifier Specifications The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only.
PAGE 22
CY8C24123A CY8C24223A CY8C24423A Table 15. 3.3-V DC Operational Amplifier Specifications Symbol Description Min Typ Max Units VOSOA Input offset voltage (absolute value) Power = low, Opamp bias = high Power = medium, Opamp bias = high Power = high, Opamp bias = high – – – 1.65 1.32 – 10 8 – mV mV mV Notes Power = high, Opamp bias = high setting is not allowed for 3.3 V VDD operation. TCVOSOA Average input offset voltage drift – 7.0 35.
PAGE 23
CY8C24123A CY8C24223A CY8C24423A Table 16. 2.7-V DC Operational Amplifier Specifications Symbol Description Min Typ Max Units VOSOA Input offset voltage (absolute value) Power = low, Opamp bias = high Power = medium, Opamp bias = high Power = high, Opamp bias = high – – – 1.65 1.32 – 10 8 – mV mV mV Notes Power = high, Opamp bias = high setting is not allowed for 2.7 V VDD operation. TCVOSOA Average input offset voltage drift – 7.0 35.
PAGE 24
CY8C24123A CY8C24223A CY8C24423A DC Analog Output Buffer Specifications The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Table 18.
PAGE 25
CY8C24123A CY8C24223A CY8C24423A Table 20. 2.7-V DC Analog Output Buffer Specifications Min Typ Max Units Notes CL Symbol Load Capacitance – – 200 pF This specification applies to the external circuit that is being driven by the analog output buffer.
PAGE 26
CY8C24123A CY8C24223A CY8C24423A DC Switch Mode Pump Specifications Table 21 lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Table 21.
PAGE 27
CY8C24123A CY8C24223A CY8C24423A Figure 10. Basic Switch Mode Pump Circuit D1 Vdd V PUMP L1 V BAT + SMP Battery PSoC C1 Vss Document Number: 38-12028 Rev.
PAGE 28
CY8C24123A CY8C24223A CY8C24423A DC Analog Reference Specifications The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only.
PAGE 29
CY8C24123A CY8C24223A CY8C24423A Table 22.
PAGE 30
CY8C24123A CY8C24223A CY8C24423A Table 22.
PAGE 31
CY8C24123A CY8C24223A CY8C24423A Table 23. 3.
PAGE 32
CY8C24123A CY8C24223A CY8C24423A Table 23. 3.3-V DC Analog Reference Specifications (continued) Reference ARF_CR [5:3] Reference Power Settings Symbol Reference Description Typ Max Units – – – – P2[4] + 1.211 P2[4] + 1.285 P2[4] + 1.348 V P2[4] P2[4] P2[4] – 0b100 All power settings Not allowed at 3.3 V – – 0b101 RefPower = high Opamp bias = high VREFHI Ref High VAGND AGND VREFLO Ref Low P2[4] – Bandgap (P2[4] = VDD/2) P2[4] – 1.354 P2[4] – 1.290 P2[4] – 1.
PAGE 33
CY8C24123A CY8C24223A CY8C24423A Table 24. 2.7-V DC Analog Reference Specifications Reference ARF_CR [5:3] Reference Power Settings Symbol Reference 0b000 All power settings Not allowed at 2.
PAGE 34
CY8C24123A CY8C24223A CY8C24423A Table 24. 2.7-V DC Analog Reference Specifications (continued) (continued) Reference ARF_CR [5:3] Reference Power Settings Symbol Reference Description Min Typ Max Units 0b011 All power settings Not allowed at 2.7 V – – – – – – – 0b100 All power settings Not allowed at 2.7 V – – – – – – – 0b101 All power settings Not allowed at 2.
PAGE 35
CY8C24123A CY8C24223A CY8C24423A DC POR, SMP, and LVD Specifications Table 24 lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Note The bits PORLEV and VM in the following table refer to bits in the VLT_CR register.
PAGE 36
CY8C24123A CY8C24223A CY8C24423A DC Programming Specifications Table 27 lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Table 27. DC Programming Specifications Symbol VDDP Description VDD for programming and erase Min 4.
PAGE 37
CY8C24123A CY8C24223A CY8C24423A AC Electrical Characteristics AC Chip-Level Specifications These tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Table 29. 5-V and 3.
PAGE 38
CY8C24123A CY8C24223A CY8C24423A Table 29. 5-V and 3.3-V AC Chip-Level Specifications (continued) Symbol DC24M DCILO Step24M Fout48M FMAX SRPOWER_UP tPOWERUP tjit_IMO [26] tjit_PLL [26] Description 24 MHz duty cycle ILO duty cycle 24 MHz trim step size 48 MHz output frequency Maximum frequency of signal on row input or row output.
PAGE 39
CY8C24123A CY8C24223A CY8C24423A Table 30. 2.7-V AC Chip-Level Specifications Symbol FIMO12 Description IMO frequency for 12 MHz Min 11.5 Typ 12 Max 12.7[27, 28] FIMO6 IMO frequency for 6 MHz 5.5 6 6.5[27, 28] FCPU1 FBLK27 CPU frequency (2.7 V nominal)0 Digital PSoC block frequency (2.7 V nominal) ILO frequency ILO untrimmed frequency 0.9370 0 30 12 3.15[27] 12.
PAGE 40
CY8C24123A CY8C24223A CY8C24423A Figure 11. PLL Lock Timing Diagram PLL Enable TPLLSLEW 24 MHz FPLL PLL Gain 0 Figure 12. PLL Lock for Low Gain Setting Timing Diagram PLL Enable TPLLSLEWLOW 24 MHz FPLL PLL Gain 1 Figure 13. External Crystal Oscillator Startup Timing Diagram 32K Select 32 kHz TOS F32K2 Document Number: 38-12028 Rev.
PAGE 41
CY8C24123A CY8C24223A CY8C24423A AC GPIO Specifications These tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Table 31. 5-V and 3.
PAGE 42
CY8C24123A CY8C24223A CY8C24423A AC Operational Amplifier Specifications The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only.
PAGE 43
CY8C24123A CY8C24223A CY8C24423A Table 35. 2.7-V AC Operational Amplifier Specifications Symbol tROA tSOA Min Typ Max Units Rising settling time from 80% of V to 0.1% of V (10 pF load, unity gain) Power = low, Opamp bias = low Power = medium, Opamp bias = high Description – – – – 3.92 0.72 µs µs Falling settling time from 20% of V to 0.1% of V (10 pF load, unity gain) Power = low, Opamp bias = low Power = medium, Opamp bias = high – – – – 5.41 0.
PAGE 44
CY8C24123A CY8C24223A CY8C24423A Figure 15. Typical Opamp Noise nV/rtHz 10000 PH_BH PH_BL PM_BL PL_BL 1000 100 10 0.001 0.01 0.1 Freq (kHz) 1 10 100 AC Low Power Comparator Specifications Table 36 lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively.
PAGE 45
CY8C24123A CY8C24223A CY8C24423A AC Digital Block Specifications The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Table 37. 5-V and 3.
PAGE 46
CY8C24123A CY8C24223A CY8C24423A Table 38. 2.7-V AC Digital Block Specifications Function Description All Functions Block input clock frequency Timer Capture pulse width Input clock frequency, with or without capture Counter Dead Band Min Typ Max Units Notes – – 12.7 MHz 2.4 V < VDD < 3.0 V 100[31] – – ns – – 12.7 MHz 100[31] – – ns Input clock frequency, no enable input – – 12.7 MHz Input clock frequency, enable input – – 12.
PAGE 47
CY8C24123A CY8C24223A CY8C24423A AC Analog Output Buffer Specifications The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Table 39.
PAGE 48
CY8C24123A CY8C24223A CY8C24423A Table 41. 2.7-V AC Analog Output Buffer Specifications Min Typ Max Units tROB Symbol Rising settling time to 0.1%, 1 V Step, 100 pF load Power = low Power = high Description – – – – 4 4 µs µs tSOB Falling settling time to 0.1%, 1 V Step, 100 pF load Power = low Power = high – – – – 3 3 µs µs SRROB Rising slew rate (20% to 80%), 1 V Step, 100 pF load Power = low Power = high 0.4 0.
PAGE 49
CY8C24123A CY8C24223A CY8C24423A Table 44. 2.7-V AC External Clock Specifications Min Typ Max Units FOSCEXT Symbol Frequency with CPU clock divide by 1[34] Description 0.093 – 12.3 MHz FOSCEXT Frequency with CPU clock divide by 2 or greater[35] 0.186 – 12.3 MHz ns – High period with CPU clock divide by 1 41.7 – 5300 – Low period with CPU clock divide by 1 41.
PAGE 50
CY8C24123A CY8C24223A CY8C24423A AC I2C Specifications The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to 5.25 V and –40 °C  TA  85 °C, 3.0 V to 3.6 V and –40 °C  TA  85 °C, or 2.4 V to 3.0 V and –40 °C  TA  85 °C, respectively. Typical parameters are measured at 5 V, 3.3 V, and 2.7 V at 25 °C and are for design guidance only. Table 46. AC Characteristics of the I2C SDA and SCL Pins for VDD > 3.
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CY8C24123A CY8C24223A CY8C24423A Packaging Information This section illustrates the packaging specifications for the CY8C24x23A PSoC device, along with the thermal impedances for each package and the typical package capacitance on crystal pins. Important Note Emulation tools may require a larger area on the target PCB than the chip's footprint. For a detailed description of the emulation tools' dimensions, see the emulator pod drawings at http://www.cypress.com/design/MR10161.
PAGE 52
CY8C24123A CY8C24223A CY8C24423A Figure 18. 8-Pin (150-Mil) SOIC 51-85066 *G Figure 19. 20-Pin (300-Mil) Molded DIP 51-85011 *D Document Number: 38-12028 Rev.
PAGE 53
CY8C24123A CY8C24223A CY8C24423A Figure 20. 20-Pin (210-Mil) SSOP 51-85077 *F Figure 21. 20-Pin (300-Mil) Molded SOIC 51-85024 *F Document Number: 38-12028 Rev.
PAGE 54
CY8C24123A CY8C24223A CY8C24423A Figure 22. 28-Pin (300-Mil) Molded DIP 51-85014 *G Figure 23. 28-Pin (210-Mil) SSOP 51-85079 *F Document Number: 38-12028 Rev.
PAGE 55
CY8C24123A CY8C24223A CY8C24423A Figure 24. 28-Pin (300-Mil) Molded SOIC 51-85026 *H Document Number: 38-12028 Rev.
PAGE 56
CY8C24123A CY8C24223A CY8C24423A Figure 25. 32-Pin Sawn QFN Package 001-30999 *D Important Note For information on the preferred dimensions for mounting QFN packages, see the application note, Application Notes for Surface Mount Assembly of Amkor's MicroLeadFrame (MLF) Packages available at http://www.amkor.com. Figure 26. 56-Pin (300-Mil) SSOP 51-85062 *F Document Number: 38-12028 Rev.
PAGE 57
CY8C24123A CY8C24223A CY8C24423A Thermal Impedances Capacitance on Crystal Pins Table 48. Thermal Impedances per Package Package Typical JA Table 49. Typical Package Capacitance on Crystal Pins [38] Package Package Capacitance 8-pin PDIP 123 °C/W 8-pin PDIP 2.8 pF 8-pin SOIC 185 °C/W 8-pin SOIC 2.0 pF 20-pin PDIP 109 °C/W 20-pin PDIP 3.0 pF 20-pin SSOP 117 °C/W 20-pin SSOP 2.6 pF 20-pin SOIC 81 °C/W 20-pin SOIC 2.5 pF 28-pin PDIP 69 °C/W 28-pin PDIP 3.
PAGE 58
CY8C24123A CY8C24223A CY8C24423A Development Tool Selection CY3210-MiniProg1 This section presents the development tools available for all current PSoC device families including the CY8C24x23A family. The CY3210-MiniProg1 kit lets you to program PSoC devices through the MiniProg1 programming unit. The MiniProg is a small, compact prototyping programmer that connects to the PC through a provided USB 2.0 cable.
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CY8C24123A CY8C24223A CY8C24423A Device Programmers CY3207ISSP In-System Serial Programmer (ISSP) All device programmers can be purchased from the Cypress Online Store. The CY3207ISSP is a production programmer. It includes protection circuitry and an industrial case that is more robust than the MiniProg in a production-programming environment. CY3216 Modular Programmer The CY3216 Modular Programmer kit features a modular programmer and the MiniProg1 programming unit.
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CY8C24123A CY8C24223A CY8C24423A Ordering Information CY8C24423A-24SXI CY8C24423A-24SXIT CY8C24423A-24LTXI CY8C24423A-24LTXIT CY8C24000A-24PVXI[43] XRES Pin CY8C24423A-24PVXIT Analog Outputs CY8C24423A-24PXI CY8C24423A-24PVXI Analog Inputs CY8C24223A-24SXIT Digital I/O Pins CY8C24223A-24SXI Analog Blocks CY8C24223A-24PVXIT Digital Blocks CY8C24223A-24PXI CY8C24223A-24PVXI Temperature Range CY8C24123A-24SXIT Switch Mode Pump CY8C24123A-24PXI CY8C24123A-24SXI SRAM (Bytes) 8-pin (300-mil) DI
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CY8C24123A CY8C24223A CY8C24423A Acronyms Acronyms Used Table 53 lists the acronyms that are used in this document. Table 53.
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CY8C24123A CY8C24223A CY8C24423A Document Conventions Units of Measure Table 54 lists the unit sof measures. Table 54.
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CY8C24123A CY8C24223A CY8C24423A Glossary (continued) bias 1. A systematic deviation of a value from a reference value. 2. The amount by which the average of a set of values departs from a reference value. 3. The electrical, mechanical, magnetic, or other force (field) applied to a device to establish a reference level to operate the device. block 1. A functional unit that performs a single function, such as an oscillator. 2.
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CY8C24123A CY8C24223A CY8C24423A Glossary (continued) duty cycle The relationship of a clock period high time to its low time, expressed as a percent. emulator Duplicates (provides an emulation of) the functions of one system with a different system, so that the second system appears to behave like the first system. external reset (XRES) An active high signal that is driven into the PSoC device. It causes all operation of the CPU and blocks to stop and return to a pre-defined state.
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CY8C24123A CY8C24223A CY8C24423A Glossary (continued) microcontroller An integrated circuit chip that is designed primarily for control systems and products. In addition to a CPU, a microcontroller typically includes memory, timing circuits, and IO circuitry. The reason for this is to permit the realization of a controller with a minimal quantity of chips, thus achieving maximal possible miniaturization. This in turn, reduces the volume and the cost of the controller.
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CY8C24123A CY8C24223A CY8C24423A Glossary (continued) shift register A memory storage device that sequentially shifts a word either left or right to output a stream of serial data. slave device A device that allows another device to control the timing for data exchanges between two devices. Or when devices are cascaded in width, the slave device is the one that allows another device to control the timing of data exchanges between the cascaded devices and an external interface.
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CY8C24123A CY8C24223A CY8C24423A Errata This section describes the errata for the CY8C24xxxA device family. Details include errata trigger conditions, scope of impact, available workaround, and silicon revision applicability. Contact your local Cypress Sales Representative if you have questions.
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CY8C24123A CY8C24223A CY8C24423A Document History Page Document Title: CY8C24123A/CY8C24223A/CY8C24423A, PSoC® Programmable System-on-Chip Document Number: 38-12028 Revision ECN Orig. of Change Submission Date Description of Change ** 236409 SFV See ECN New silicon and new document – Preliminary datasheet. *A 247589 SFV See ECN Changed the title to read “Final” datasheet. Updated Electrical Specifications chapter. *B 261711 HMT See ECN Input all SFV memo changes.
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CY8C24123A CY8C24223A CY8C24423A Document History Page (continued) Document Title: CY8C24123A/CY8C24223A/CY8C24423A, PSoC® Programmable System-on-Chip Document Number: 38-12028 Revision ECN Orig. of Change Submission Date Description of Change *L 2897881 MAXK / NJF 03/23/2010 Add “More Information” on page 2. Update unit in Table 10-28 and Table 38 of SPIS Maximum Input Clock Frequency from ns to MHz.
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CY8C24123A CY8C24223A CY8C24423A Document History Page (continued) Document Title: CY8C24123A/CY8C24223A/CY8C24423A, PSoC® Programmable System-on-Chip Document Number: 38-12028 Revision ECN Orig. of Change Submission Date *T 4066332 PMAD 07/17/2013 Description of Change Added Errata Footnotes (Note 1, 19). Updated PSoC Functional Overview: Updated PSoC Core: Added Note 1 and referred the same note in 4th paragraph in PSoC Core.
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CY8C24123A CY8C24223A CY8C24423A Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. PSoC® Solutions Products Automotive Clocks & Buffers Interface Lighting & Power Control Memory cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.