Specifications

CY7C6431x
CY7C6434x
CY7C6435x
Document Number: 001-12394 Rev. *R Page 19 of 40
ADC Electrical Specifications
Table 10. DC Characteristics – USB Interface
Symbol Description Conditions Min Typ Max Units
Rusbi USB D+ pull-up resistance With idle bus 0.900 – 1.575 k
Rusba USB D+ pull-up resistance While receiving traffic 1.425 – 3.090 k
Vohusb Static output high 2.8 – 3.6 V
Volusb Static output low – – 0.3 V
Vdi Differential input sensitivity 0.2 – – V
Vcm Differential input common mode range 0.8 – 2.5 V
Vse Single-ended receiver threshold 0.8 – 2.0 V
Cin Transceiver capacitance – 50 pF
Iio High Z state data Line Leakage On D+ or D– line –10 – +10 A
Rps2 PS/2 Pull Up Resistance 3 5 7 k
Rext External USB Series Resistor In series with each USB pin 21.78 22.0 22.22 
Table 11. ADC User Module Electrical Specifications
Symbol Description Conditions Min Typ Max Units
Input
V
IN
Input voltage range 0 – VREFADC V
C
IIN
Input capacitance – – 5 pF
R
IN
Input resistance Equivalent switched cap input
resistance for 8-, 9-, or 10-bit
resolution
1/(500fF*
Data Clock)
1/(400fF*
Data Clock)
1/(300fF*
Data Clock)

Reference
V
REFADC
ADC reference voltage 1.14 – 1.26 V
Conversion Rate
F
CLK
Data clock Source is chip’s internal main
oscillator. See AC Chip-Level
Specifications for accuracy
2.25 – 6 MHz
S8 8-bit sample rate Data Clock set to 6 MHz.
Sample Rate = 0.001/
(2^Resolution/Data Clock)
– 23.4375 – ksps
S10 10-bit sample rate Data Clock set to 6 MHz.
Sample Rate = 0.001/
(2^Resolution/Data Clock)
– 5.859 – ksps
DC Accuracy
RES Resolution Can be set to 8-, 9-, or 10-bit 8 – 10 bits
DNL Differential nonlinearity –1 – +2 LSB
INL Integral nonlinearity –2 – +2 LSB
E
Offset
Offset error 8-bit resolution 0 3.2 19.2 LSB
10-bit resolution 0 12.8 76.8 LSB
E
gain
Gain error For any resolution –5 – +5 %FSR
Power
I
ADC
Operating current – 2.1 2.6 mA
PSRR Power supply rejection ratio PSRR (
V
DD
> 3.0 V) – 24 – dB
PSRR (
V
DD
< 3.0 V) – 30 – dB