User manual

CY8C27143, CY8C27243
CY8C27443, CY8C27543, CY8C27643
Document Number: 38-12012 Rev. *O Page 32 of 53
AC Electrical Characteristics
AC Chip-Level Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ T
A
≤ 85°C, or 3.0V to 3.6V and -40°C ≤ T
A
≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
Table 31. AC Chip-Level Specifications
Symbol Description Min Typ Max Unit Notes
F
IMO
Internal Main Oscillator Frequency 23.4 24 24.6
[13]
MHz Trimmed. Utilizing factory trim
values.
F
CPU1
CPU Frequency (5V Nominal) 0.93 24 24.6
[13,14]
MHz Trimmed. Utilizing factory trim
values.
F
CPU2
CPU Frequency (3.3V Nominal) 0.93 12 12.3
[14,15]
MHz Trimmed. Utilizing factory trim
values.
F
48M
Digital PSoC Block Frequency 0 48 49.2
[13,14, 16]
MHz Refer to the AC Digital Block
Specifications below.
F
24M
Digital PSoC Block Frequency 0 24 24.6
[14, 16]
MHz
F
32K1
Internal Low Speed Oscillator
Frequency
15 32 64 kHz
F
32K2
External Crystal Oscillator – 32.768 – kHz Accuracy is capacitor and
crystal dependent. 50% duty
cycle.
F
32K_U
Internal Low Speed Oscillator (ILO)
Untrimmed Frequency
5 – – kHz After a reset and before the
m8c starts to run, the ILO is not
trimmed. See the System
Resets section of the PSoC
Technical Reference Manual
for details on timing this
F
PLL
PLL Frequency – 23.986 – MHz Multiple (x732) of crystal
frequency.
Jitter
24M2
24 MHz Period Jitter (PLL) – – 600 ps
T
PLLSLEW
PLL Lock Time 0.5 – 10 ms
T
PLLSLEWSLOW
PLL Lock Time for Low Gain Setting 0.5 – 50 ms
T
OS
External Crystal Oscillator Startup to
1%
– 1700 2620 ms
T
OSACC
External Crystal Oscillator Startup to
100 ppm
– 2800 3800 ms The crystal oscillator frequency
is within 100 ppm of its final
value by the end of the T
osacc
period. Correct operation
assumes a properly loaded 1
µW maximum drive level
32.768 kHz crystal. 3.0V ≤ Vdd
≤ 5.5V,
-40°C ≤ T
A
≤ 85°C.
Jitter
32k
32 kHz Period Jitter – 100 – ns
T
XRST
External Reset Pulse Width 10 – – μs
DC
24M
24 MHz Duty Cycle 40 50 60 %
DC
ILO
Internal Low Speed Oscillator Duty
Cycle
20 50 80 %
Step
24M
24 MHz Trim Step Size – 50 – kHz
Notes
13. 4.75V < Vdd < 5.25V.
14. Accuracy derived from Internal Main Oscillator with appropriate trim for Vdd range.
15. 3.0V < Vdd < 3.6V. See Application Note AN2012 “Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” for information on trimming for operation
at 3.3V.
16. See the individual user module data sheets for information on maximum frequencies for user modules.
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