User manual
CY8C24223A, CY8C24423A
Document Number: 38-12029 Rev. *H Page 25 of 34
AC Digital Block Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ T
A
≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only.
Table 24. AC Digital Block Specifications
Function Description Min Typ Max Units Notes
All Functions Maximum Block Clocking Frequency – – 24.96
[12]
MHz
Timer Capture Pulse Width 50
[14]
– – ns
Maximum Frequency, No Capture – – 24.96
[12]
MHz
Maximum Frequency, With Capture – – 24.96
[12]
MHz
Counter Enable Pulse Width 50
[14]
– – ns
Maximum Frequency, No Enable Input – – 24.96
[12]
MHz
Maximum Frequency, Enable Input – – 24.96
[12]
MHz
Dead Band Kill Pulse Width:
Asynchronous Restart Mode 20 – – ns
Synchronous Restart Mode 50
[14]
– – ns
Disable Mode 50
[14]
– – ns
Maximum Frequency – – 24.96
[12]
MHz
CRCPRS
(PRS Mode)
Maximum Input Clock Frequency – – 24.96
[12]
MHz
CRCPRS
(CRC Mode)
Maximum Input Clock Frequency – – 24.96
[12]
MHz
SPIM Maximum Input Clock Frequency – – 4.16
[12]
MHz Maximum data rate is 2.08
Mbps due to 2 x over clocking.
SPIS Maximum Input Clock Frequency – – 2.08
[12]
MHz
Width of SS_ Negated Between
Transmissions
50
[14]
– – ns
Transmitter Maximum Input Clock Frequency – – 8.32
[12]
MHz Maximum baud rate is 1.04
Mbaud due to 8 x over clocking.
Receiver Maximum Input Clock Frequency – – 24.96
[12]
MHz Maximum baud rate is 3.12
Mbaud due to 8 x over clocking.
Note
14. 50 ns minimum input pulse width is based on the input synchronizers running at 24 MHz (42 ns nominal period).
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