Specifications

October 25, 2006 Cypress Semiconductor – Rev. ** 11
2. System Architecture
2.1 Overview
The LIN bus, Local Interconnect Network, is an asynchro-
nous, 1 wire, single master, multiple slave network. It is most
commonly used in automobile networks.
2.2 Features of the PSoC LIN
Bus 2.0 Design
■ Single master, multiple slaves - up to 16 slaves.
■ Message-based protocol.
■ Single wire - maximum 40 m.
■ Data rates of 2.4K, 4.8K, 9.6K and 19.2K are supported
by master.
■ Slaves capable of synchronizing to any baud rate from
2K to 20K.
■ Self synchronization of slaves to master’s speed.
■ Data format similar to common serial UART format.
■ Safe behavior with data checksums and bit-error detec-
tion.
■ 100% LIN Bus 2.0 protocol-compliant.
■ Master design uses minimal resources (only three digital
blocks) and is easy to implement (using overlapping
configurations).
■ Slave designs use minimal resources (only four digital
blocks) and are easy to implement (using overlapping
configurations). The slave design for the CY8C21x34
device family uses the least amount of system
resources.
■ The PSoC design IP is provided for master and slave
nodes in the following device families:
❐ CY8C29x66 Industrial
❐ CY8C27x43 Automotive
❐ CY8C27x43 Industrial
❐ CY8C21x34 Industrial
Figure 2-1. Structure of a LIN Frame
2.3 LIN Frame
2.3.1 Basic LIN Frame
The LIN communication takes place in frames. Figure 2-1
shows the structure of a frame.
It is made of a break field followed by 4 to 11 byte fields.
Each byte field is transmitted as a serial byte as shown in
Figure 2-2.