Datasheet
CY8C21x34B
Document Number: 001-67345 Rev. *E Page 31 of 49
Table 29. 3.3-V AC External Clock Specifications
Symbol Description Min Typ Max Units Notes
F
OSCEXT
Frequency with CPU clock divide by 1 0.093 – 12.3 MHz Maximum CPU frequency is 12 MHz
at 3.3 V. With the CPU clock divider
set to 1, the external clock must
adhere to the maximum frequency
and duty cycle requirements
F
OSCEXT
Frequency with CPU clock divide by 2 or
greater
0.186 – 24.6 MHz If the frequency of the external clock
is greater than 12 MHz, the CPU clock
divider must be set to 2 or greater. In
this case, the CPU clock divider
ensures that the fifty percent duty
cycle requirement is met
– High period with CPU clock divide by 1 41.7
– 5300 ns
– Low period with CPU clock divide by 1 41.7
– –ns
– Power-up IMO to switch 150
– –µs
Table 30. 2.7-V AC External Clock Specifications
Symbol Description Min Typ Max Units Notes
F
OSCEXT
Frequency with CPU clock divide by 1 0.093 –3.08
0
MHz Maximum CPU frequency is 3 MHz at
2.7 V. With the CPU clock divider set
to 1, the external clock must adhere to
the maximum frequency and duty
cycle requirements
F
OSCEXT
Frequency with CPU clock divide
by 2 or greater
0.186 – 6.35 MHz If the frequency of the external clock
is greater than 3 MHz, the CPU clock
divider must be set to 2 or greater. In
this case, the CPU clock divider
ensures that the fifty percent duty
cycle requirement is met
– High period with CPU clock divide by 1 160
– 5300 ns
– Low period with CPU clock divide by 1 160
– –ns
– Power-up IMO to switch 150
– –µs