Datasheet

CY8C21x34B
Document Number: 001-67345 Rev. *E Page 27 of 49
Table 22. 2.7-V AC Chip-Level Specifications
Symbol Description Min Typ Max Units Notes
F
IMO12
IMO frequency for 12 MHz 11.5 12
0
12.7
[21,22]
MHz Trimmed for 2.7 V operation
using factory trim values. See
Figure 14 on page 19. SLIMO
mode = 1
F
IMO6
IMO frequency for 6 MHz 5.5 6 6.5
[21,22]
MHz Trimmed for 2.7 V operation
using factory trim values. See
Figure 14 on page 19. SLIMO
mode = 1
F
CPU1
CPU frequency (2.7 V nominal) 0.093 3 3.15
[21]
MHz 12 MHz only for
SLIMO mode = 0
F
BLK27
Digital PSoC block frequency (2.7 V nominal) 0 12 12.5
[21,22]
MHz Refer to AC Digital Block
Specifications on page 29
F
32K1
ILO frequency 8 32 96 kHz
F
32K_U
ILO untrimmed frequency 5 – 100 kHz After a reset and before the
M8C starts to run, the ILO is
not trimmed. See the System
Resets section of the PSoC
Technical Reference Manual
for details on this timing
t
XRST
External reset pulse width 10 – – µs
DC
ILO
IILO duty cycle 20 50 80 %
F
MAX
Maximum frequency of signal on row input or
row output.
– – 12.3 MHz
SR
POWER_UP
Power supply slew rate – – 250 V/ms V
DD
slew rate during
power-up
t
POWERUP
Time from end of POR to CPU executing code – 16 100 ms Power-up from 0 V. See the
System Resets section of the
PSoC Technical Reference
Manual.
t
jit_IMO
12 MHz IMO cycle-to-cycle jitter (RMS)
[23]
– 400 1000 ps
12 MHz IMO long term N cycle-to-cycle jitter
(RMS)
[23]
– 600 1300 ps N = 32
12 MHz IMO period jitter (RMS)
[23]
– 100 500 ps
Note
21. 2.4 V < V
DD
< 3.0 V.
22. See Application Note AN2012 “Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” available at http://www.cypress.com for information on
maximum frequency for user modules.
23. Refer to Cypress Jitter Specifications Application Note AN5054 “Understanding Datasheet Jitter Specifications for Cypress Timing Products” at
www.cypress.com under Application Notes for more information.