Datasheet

26 Document No. 001-66271 Rev. *B CY8C21x34/B CapSense
®
Design Guide
3.10.3 Reference
A voltage reference to the input of the comparator is required for the proper operation of CSD.
Possible values are:
 VBG: Internal voltage reference of 1.3 V derived from a fixed band-gap reference.
 ASE11: Internal variable voltage reference derived from a PWM.
 AnalogColumn_InputSelect_1: External voltage reference such as a resistor divider network or externally filtered
PWM/PRSPWM signal. This reference can be connected to a CapSense controller pin and used as the
comparator reference source.
3.10.4 Ref Value
The effect of Ref Value depends on the Reference parameter. When Reference is set to ASE11, Ref Value sets the
reference value.
Possible values are 0 (minimum ¼ V
DD
) to 8 (maximum ¾ V
DD
).
Increasing Ref Value decreases sensitivity, but increases the influence on the shield electrode. If the design has
sensors with noticeable capacitance differences (sensor pads of different sizes), you can use an API function to
balance raw counts by setting a higher Ref Value for the sensors with larger capacitance.
Ref Value has no effect when Reference is set to VBG or AnalogColumn_InputSelect_1. Ref Value is not available in
CSDADC with the VC2 clock source configuration.
3.10.5 Prescaler Period
Prescaler Period determines the precharge switch output frequency.
Possible values are 1 to 255. The recommended values are 2
n – 1
to obtain the maximum signal-to-noise ratio (1, 3, 7,
15, 31, 63, 127, or 255). Other values can result in more noise, especially at low resolution and high scan speed.
Prescaler Period is available only for configurations with prescaler.
3.10.6 Shield Electrode Out
The shield electrode signal source can be selected from one of the free digital row buses (Row_0_Output_1 to
Row_0_Output_3). Each row output can be routed to one of three pins. Set the Row LUT Function to A.
Possible values are Enabled and Disabled.
This parameter is available only in CSDADC with the PRS8/PRS16 clock source configurations. In CSDADC with the
PWM8 clock source configuration, the shield electrode signal is permanently connected to Row_0_Output_0.
3.10.7 ADC Enabled
When this parameter is set to Enabled, the ADC routines are included in the compliable code and can be called from
user code. When this parameter is set to Disabled, the ADC routines are not included. Setting this parameter to
Disabled can be useful in saving the flash memory if the ADC is no longer required by your design. When this
parameter is set to Disabled, the CSDADC User Module behaves the same as the CSD User Module.