Datasheet

20 Document No. 001-66271 Rev. *B CY8C21x34/B CapSense
®
Design Guide
Sensor states are updated by the user module API UMname_bIsAnySensorActive()
3.4 CSD User Module Configurations
The CSD User Module has two selectable clock configurations. These configurations use different signal sources for
the switched-capacitor circuit on the front end of the CSD, as shown in Figure 2-3 on page 13.
You should select the clock configuration when you first place the CSD User Module in your PSoC Designer project.
You can change this selection later by right-clicking the CSD User Module and selecting User Module Selection
Options.
3.4.1 CSD without Clock Prescaler
In this configuration, a 16-bit pseudo-random sequence (PRS) is used as the signal source for the switched-capacitor
circuit on the front end of the CSD. System Clock (IMO) is the clock source for the PRS. The PRS spreads the clock’s
frequency spectrum and provides good noise immunity. This configuration requires three digital blocks.
3.4.2 CSD with Clock Prescaler
In this configuration, an 8-bit PRS is used as the signal source for the switched capacitor circuit on the front end of
the CSD. IMO is divided by an adjustable prescaler divider and is used as the clock source for the PRS. The PRS
spreads the clock’s frequency spectrum to provide noise immunity. Note that the 16-bit PRS used in the CSD without
the Clock Prescaler configuration provides better noise immunity. This configuration requires three digital blocks.
Because it needs a lower switching frequency, use this configuration when operating in an environment with high C
P.
The relationship between C
P
and switching frequency is discussed in Select Prescaler.
3.5 CSD User Module Parameters
The CSD User Module parameters are classified into high-level and low-level parameters. See Figure 3-5 for a list of
CSD user module parameters and how they are classified.
Figure 3-5. PSoC Designer - CSD Parameters Window
High-Level
Low-Level