Datasheet

CY8C21634/CY8C21534/CY8C21434
CY8C21334/CY8C21234
Document Number: 38-12025 Rev. AF Page 13 of 55
CY8C21434/CY8C21634 32-pin QFN Pin Definitions
Pin No.
[15]
Type
Name Description
Digital Analog
1 I/O I, M P0[1] Analog column mux input, integrating input
2 I/O M P2[7]
3 I/O M P2[5]
4 I/O M P2[3]
5 I/O M P2[1]
6 I/O M P3[3] In CY8C21434 part
6 Power SMP SMP connection to required external components in CY8C21634 part
7 I/O M P3[1] In CY8C21434 part
7 Power V
SS
Ground connection in CY8C21634 part
[16]
8 I/O M P1[7] I
2
C SCL
9 I/O M P1[5] I
2
C SDA
10 I/O M P1[3]
11 I/O M P1[1] I
2
C SCL, ISSP-SCLK
[17]
12 Power V
SS
Ground connection
[16]
13 I/O M P1[0] I
2
C SDA, ISSP-SDATA
[17]
14 I/O M P1[2]
15 I/O M P1[4] Optional external clock input (EXTCLK)
16 I/O M P1[6]
17 Input XRES Active high external reset with internal pull-down
18 I/O M P3[0]
19 I/O M P3[2]
20 I/O M P2[0]
21 I/O M P2[2]
22 I/O M P2[4]
23 I/O M P2[6]
24 I/O I, M P0[0] Analog column mux input
25 I/O I, M P0[2] Analog column mux input
26 I/O I, M P0[4] Analog column mux input
27 I/O I, M P0[6] Analog column mux input
28 Power V
DD
Supply voltage
29 I/O I, M P0[7] Analog column mux input
30 I/O I, M P0[5] Analog column mux input
31 I/O I, M P0[3] Analog column mux input, integrating input
32 Power V
SS
Ground connection
[16]
LEGEND
A = Analog, I = Input, O = Output, and M = Analog Mux Input.
Notes
15. The center pad on the QFN package must be connected to ground (V
SS
) for best mechanical, thermal, and electrical performance. If not connected to ground, it must
be electrically floated and not connected to any other signal.
16. All V
SS
pins should be brought out to one common GND plane.
17. These are the ISSP pins, which are not high Z at POR. See the
PSoC Technical Reference Manual for details.