Datasheet

CY8C21634, CY8C21534, CY8C21434
CY8C21334, CY8C21234
Document Number: 38-12025 Rev. AB Page 25 of 53
AC Electrical Characteristics
AC Chip-Level Specifications
The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75 V to
5.25 V and –40 °C  T
A
 85 °C, 3.0 V to 3.6 V and –40 °C  T
A
 85 °C, or 2.4 V to 3.0 V and –40 °C  T
A
 85 °C, respectively.
Typical parameters are measured at 5 V, 3.3 V, or 2.7 V at 25 °C and are for design guidance only.
Table 16. 5-V and 3.3-V AC Chip-Level Specifications
Symbol Description Min Typ Max Units Notes
F
IMO24
[23]
IMO frequency for 24 MHz 23.4 24 24.6
[24,25]
MHz Trimmed for 5 V or 3.3 V
operation using factory trim
values. See Figure 14 on
page 19. SLIMO mode = 0
F
IMO6
[23]
IMO frequency for 6 MHz 5.52 6 6.48
[24,25]
MHz Trimmed for 5 V or 3.3 V
operation using factory trim
values. See Figure 14 on
page 19. SLIMO mode = 1
F
CPU1
CPU frequency (5 V nominal) 0.091 24 24.6
[24]
MHz 24 MHz only for
SLIMO mode = 0
F
CPU2
CPU frequency (3.3 V nominal) 0.091 12 12.3
[25]
MHz SLIMO mode = 0
F
BLK5
Digital PSoC block frequency
0
(5 V nominal) 0 48 49.2
[24,26]
MHz Refer to AC Digital Block
Specifications on page 28
F
BLK33
Digital PSoC block frequency (3.3 V nominal) 0 24 24.6
[26]
MHz
F
32K1
ILO frequency 15 32 64 kHz
F
32K_U
ILO untrimmed frequency 5 – 100 kHz After a reset and before the
M8C starts to run, the ILO is
not trimmed. See the system
resets section of the PSoC
Technical Reference Manual
for details on this timing
t
XRST
External reset pulse width 10 – – s
DC24M 24 MHz duty cycle 40 50 60 %
DC
ILO
ILO duty cycle 20 50 80 %
Step24M 24 MHz trim step size – 50 – kHz
Fout48M 48 MHz output frequency 46.8 48.0 49.2
[24,25]
MHz Trimmed. Using factory trim
values
F
MAX
Maximum frequency of signal on row input or
row output.
– – 12.3 MHz
SR
POWER_UP
Power supply slew rate – – 250 V/ms V
DD
slew rate during
power-up
t
POWERUP
Time from end of POR to CPU executing code – 16 100 ms Power-up from 0 V. See the
System Resets section of the
PSoC Technical Reference
Manual
t
jit_IMO
24-MHz IMO cycle-to-cycle jitter (RMS)
[27]
–200 700 ps
24-MHz IMO long term N cycle-to-cycle jitter
(RMS)
[27]
– 300 900 ps N = 32
24-MHz IMO period jitter (RMS)
[27]
–100 400 ps
Notes
23. Errata: The worst case IMO frequency deviation when operated below 0 °C and above +70 °C and within the upper and lower datasheet temperature range is ±5%.
24. 4.75 V < V
DD
< 5.25 V.
25. 3.0 V < V
DD
< 3.6 V. See application note AN2012 “Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” for information on trimming for operation
at 3.3 V.
26. See the individual user module datasheets for information on maximum frequencies for user modules.
27. Refer to Cypress Jitter Specifications Application Note AN5054 “Understanding Datasheet Jitter Specifications for Cypress Timing Products” at
www.cypress.com under Application Notes for more information.