User guide

CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
Document Number: 38-08032 Rev. *X Page 48 of 71
9.9 Slave FIFO Synchronous Write
Figure 9-9. Slave FIFO Synchronous Write Timing Diagram
[24]
Z
Z
t
SFD
t
FDH
DATA
IFCLK
SLWR
FLAGS
t
WRH
t
XFLG
t
IFCLK
t
SWR
N
Table 22. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK
[25]
Parameter Description Min Max Unit
t
IFCLK
IFCLK period 20.83 – ns
t
SWR
SLWR to clock setup time 10.4 – ns
t
WRH
Clock to SLWR hold time 0 – ns
t
SFD
FIFO data to clock setup time 9.2 – ns
t
FDH
Clock to FIFO data hold time 0 – ns
t
XFLG
Clock to FLAGS output propagation time – 9.5 ns
Table 23. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK
[25]
Parameter Description Min Max Unit
t
IFCLK
IFCLK Period 20.83 200 ns
t
SWR
SLWR to clock setup time 12.1 – ns
t
WRH
Clock to SLWR hold time 3.6 – ns
t
SFD
FIFO data to clock setup time 3.2 – ns
t
FDH
Clock to FIFO data hold time 4.5 – ns
t
XFLG
Clock to FLAGS output propagation time – 13.5 ns