User`s guide

CY7C65113C
Document #: 38-08002 Rev. *G Page 17 of 48
12-bit Free-Running Timer
The 12-bit timer operates with a 1-μs tick, provides two interrupts (128 μs and 1.024 ms) and allows the firmware to directly time
events that are up to 4 ms in duration. The lower eight bits of the timer can be read directly by the firmware. Reading the lower eight
bits latches the upper four bits into a temporary register. When the firmware reads the upper four bits of the timer, it is actually reading
the count stored in the temporary register. The effect of this is to ensure a stable 12-bit timer value can be read, even when the two
reads are separated in time.
Figure 11. Timer LSB Register
Bit [7:0]: Timer lower eight bits
Figure 12. Timer MSB Register.
Bit [3:0]: Timer higher nibble
Bit [7:4]: Reserved.
Figure 13. Timer Block Diagram
Timer LSB Address 0x24
Bit # 76543210
Bit Name Timer Bit 7 TimerBit 6 Timer Bit 5 Timer Bit 4 Timer Bit 3 Timer Bit 2 Timer Bit 1 Timer Bit 0
Read/WriteRRRRRRRR
Reset 00000000
Timer MSB Address 0x25
Bit # 76543210
Bit Name Reserved Reserved Reserved Reserved Timer Bit 11 Timer Bit 10 Timer Bit 9 Timer Bit 8
Read/Write – – – – R R R R
Reset 00000000
10 9 78
5
6 432
1 MHz clock
1.024-ms interrupt
128-
μs interrupt
To Timer Registers
8
1 011
L1 L0L2L3
D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0