User`s guide

CY7C65113C
Document #: 38-08002 Rev. *G Page 15 of 48
A read from a GPIO port always returns the present state of the
voltage at the pin, independent of the settings in the Port Data
Registers. During reset, all of the GPIO pins are set to a
high-impedance input state. Writing a ‘0’ to a GPIO pin drives the
pin LOW. In this state, a ‘0’ is always read on that GPIO pin
unless an external source overdrives the internal pull-down
device.
GPIO Configuration Port
Every GPIO port can be programmed as inputs with internal
pull-ups, outputs LOW or HIGH, or Hi-Z (floating, the pin is not
driven internally). In addition, the interrupt polarity for each port
can be programmed. The Port Configuration bits (Figure ) and
the Interrupt Enable bit (Figure 10 through Figure 10) determine
the interrupt polarity of the port pins
Figure 8. GPIO Configuration Register.
As shown in Table 4 below, a positive polarity on an input pin
represents a rising edge interrupt (LOW to HIGH), and a negative
polarity on an input pin represents a falling edge interrupt (HIGH
to LOW).
The GPIO interrupt is generated when all of the following condi-
tions are met: the Interrupt Enable bit of the associated Port
Interrupt Enable Register is enabled, the GPIO Interrupt Enable
bit of the Global Interrupt Enable Register (Figure 18) is enabled,
the Interrupt Enable Sense (bit 2, Figure 17) is set, and the GPIO
pin of the port sees an event matching the interrupt polarity.
The driving state of each GPIO pin is determined by the value
written to the pin’s Data Register (Figure 6 through Figure ) and
by its associated Port Configuration bits as shown in the GPIO
Configuration Register (Figure ). These ports are configured on
a per-port basis, so all pins in a given port are configured
together. The possible port configurations are detailed in Table 4.
As shown in this table below, when a GPIO port is configured with
CMOS outputs, interrupts from that port are disabled.
During reset, all of the bits in the GPIO Configuration Register
are written with ‘0’ to select Hi-Z mode for all GPIO ports as the
default configuration.
GPIO Configuration Address 0x08
Bit # 76543210
Bit Name Reserved Reserved Reserved Reserved Port 1
Config Bit 1
Port 1
Config Bit 0
Port 0
Config Bit 1
Port 0
Config Bit 0
Read/Write - - - - R/W R/W R/W R/W
Reset ----0000