User`s guide

CY7C63722C
CY7C63723C
CY7C63743C
FOR
FOR
Document #: 38-08022 Rev. *C Page 38 of 49
24.0 Absolute Maximum Ratings
Storage Temperature ..........................................................................................................................................–65°C to +150°C
Ambient Temperature with Power Applied...............................................................................................................–0°C to +70°C
Supply Voltage on V
CC
Relative to V
SS
..................................................................................................................–0.5V to +7.0V
DC Input Voltage........................................................................................................................................... –0.5V to +V
CC
+0.5V
DC Voltage Applied to Outputs in High Z State............................................................................................ –0.5V to + V
CC
+0.5V
Maximum Total Sink Output Current into Port 0 and 1 and Pins.......................................................................................... 70 mA
Maximum Total Source Output Current into Port 0 and 1 and Pins ..................................................................................... 30 mA
Maximum On-chip Power Dissipation on any GPIO Pin ......................................................................................................50 mW
Power Dissipation ..............................................................................................................................................................300 mW
Static Discharge Voltage .................................................................................................................................................. > 2000V
Latch-up Current ........................................................................................................................................................... > 200 mA
25.0 DC Characteristics FOSC = 6 MHz; Operating Temperature = 0 to 70°C
Parameter Conditions Min. Max. Unit
General
V
CC1
Operating Voltage Note 4 V
LVR
5.5 V
V
CC2
Operating Voltage Note 4 4.35 5.25 V
I
CC1
V
CC
Operating Supply Current – Internal
Oscillator Mode
Typical I
CC1
= 16 mA
[5]
V
CC
= 5.5V, no GPIO loading
V
CC
= 5.0V. T = Room Temperature
20 mA
I
CC2
V
CC
Operating Supply Current – External
Oscillator Mode
Typical I
CC2
= 13 mA
[5]
V
CC
= 5.5V, no GPIO loading
V
CC
= 5.0V. T = Room Temperature
17 mA
I
SB1
Standby Current – No Wake-up Osc Oscillator off, D– > 2.7V 25 µA
I
SB2
Standby Current – With Wake-up Osc Oscillator off, D– > 2.7V 75 µA
V
PP
Programming Voltage (disabled) –0.4 0.4 V
T
RSNTR
Resonator Start-up Interval V
CC
= 5.0V, ceramic resonator 256 µs
I
IL
Input Leakage Current Any I/O pin 1 µA
I
SNK
Max I
SS
GPIO Sink Current Cumulative across all ports
[6]
70 mA
I
SRC
Max I
CC
GPIO Source Current Cumulative across all ports
[6]
30 mA
Low-Voltage and Power-on Reset
V
LVR
Low-Voltage Reset Trip Voltage V
CC
below V
LVR
for >100 ns
[7]
3.5 4.0 V
t
VCCS
V
CC
Power-on Slew Time linear ramp: 0 to 4V
[8]
100 ms
USB Interface
V
REG
VREG Regulator Output Voltage Load = R
PU
+R
PD
[9, 10]
3.0 3.6 V
C
REG
Capacitance on VREG Pin External cap not required 300 pF
V
OHU
Static Output High, driven R
PD
to Gnd
[4]
2.8 3.6 V
Notes:
4. Full functionality is guaranteed in V
CC1
range, except USB transmitter specifications and GPIO output currents are guaranteed for V
CC2
range.
5. Bench measurements taken under nominal operating conditions. Spec cannot be guaranteed at final test.
6. Total current cumulative across all Port pins, limited to minimize Power and Ground-Drop noise effects.
7. LVR is automatically disabled during suspend mode.
8. LVR will re-occur whenever V
CC
drops below V
LVR
. In suspend or with LVR disabled, BOR occurs whenever V
CC
drops below approximately 2.5V.
9. V
REG
specified for regulator enabled, idle conditions (i.e., no USB traffic), with load resistors listed. During USB transmits from the internal SIE, the VREG
output is not regulated, and should not be used as a general source of regulated voltage in that case. During receive of USB data, the VREG output drops
when D– is LOW due to internal series resistance of approximately 200Ω at the VREG pin.
10. In suspend mode, V
REG
is only valid if R
PU
is connected from D– to VREG pin, and R
PD
is connected from D– to ground.