Datasheet
Table Of Contents
- Features
- Configurations
- Functional Description
- Logic Block Diagram (CY7C14161KV18)
- Logic Block Diagram (CY7C14271KV18)
- Logic Block Diagram (CY7C14181KV18)
- Logic Block Diagram (CY7C14201KV18)
- Contents
- Pin Configuration
- Pin Definitions
- Functional Overview
- Application Example
- Truth Table
- Burst Address Table (CY7C14181KV18, CY7C14201KV18)
- Write Cycle Descriptions
- Write Cycle Descriptions
- Write Cycle Descriptions
- IEEE 1149.1 Serial Boundary Scan (JTAG)
- TAP Controller State Diagram
- TAP Controller Block Diagram
- TAP Electrical Characteristics
- TAP AC Switching Characteristics
- TAP Timing and Test Conditions
- Identification Register Definitions
- Scan Register Sizes
- Instruction Codes
- Boundary Scan Order
- Power Up Sequence in DDR II SRAM
- Maximum Ratings
- Operating Range
- Neutron Soft Error Immunity
- Electrical Characteristics
- Capacitance
- Thermal Resistance
- Switching Characteristics
- Switching Waveforms
- Ordering Information
- Package Diagram
- Document History Page
- Sales, Solutions, and Legal Information
CY7C14161KV18, CY7C14271KV18
CY7C14181KV18, CY7C14201KV18
Document Number: 001-58826 Rev. *D Page 23 of 30
I
SB1
Automatic Power Down
Current
Max V
DD
,
Both Ports Deselected,
V
IN
≥ V
IH
or V
IN
≤ V
IL
f = f
MAX
= 1/t
CYC
,
Inputs Static
333 MHz (x8) 290 mA
(x9) 290
(x18) 290
(x36) 290
300 MHz (x8) 280 mA
(x9) 280
(x18) 280
(x36) 280
250 MHz (x8) 270 mA
(x9) 270
(x18) 270
(x36) 270
200 MHz (x8) 250 mA
(x9) 250
(x18) 250
(x36) 250
167 MHz (x8) 250 mA
(x9) 250
(x18) 250
(x36) 250
AC Electrical Characteristics
Over the Operating Range
[11]
Parameter Description Test Conditions Min Typ Max Unit
V
IH
Input HIGH Voltage V
REF
+ 0.2 – – V
V
IL
Input LOW Voltage – – V
REF
– 0.2 V
Electrical Characteristics (continued)
DC Electrical Characteristics
Over the Operating Range
[12]
Parameter Description Test Conditions Min Typ Max Unit
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