Datasheet

Document Number: 001-12560 Rev. *F Revised August 24, 2009 Page 24 of 24
QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress, IDT, NEC, Renesas, and Samsung. All product and company names mentioned in this document
are the trademarks of their respective holders.
CY7C1513JV18
CY7C1515JV18
© Cypress Semiconductor Corporation, 2007-2009. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used
for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use
as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support
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assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
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Document History Page
Document Title: CY7C1513JV18/CY7C1515JV18, 72-Mbit QDR
®
II SRAM 4-Word Burst Architecture
Document Number: 001-12560
Rev. ECN No.
Submission
Date
Orig. of
Change
Description of Change
** 808457 See ECN VKN New data sheet
*A 1273951 See ECN VKN Removed t
SD
footnote
*B 1462588 See ECN VKN/AESA Converted from preliminary to final
Removed 250MHz and 200MHz speed bins
Updated I
DD
/I
SB
specs
Changed DLL minimum operating frequency from 80MHz to 120MHz
Changed t
CYC
max spec to 8.4ns
*C 2189567 See ECN VKN/AESA Minor Change-Moved to the external web
*D 2551501 08/12/08 VKN/AESA Changed Ambient Temperature with Power Applied from “–10°C to +85°C” to “–55°C
to +125°C” in the “Maximum Ratings“on page 21, Updated power up sequence
waveform and its description, Added footnote #21 related to I
DD
, Changed Θ
JA
spec
from 16.2 to 16.3, Changed Θ
JC
spec from 2.3 to 2.1,
Changed JTAG ID [31:29] from 001 to 000, Added 250MHz and 167MHz speed bins
*E 2746930 07/31/09 NJY Post to external website
*F 2755838 08/25/2009 VKN/AESA Removed x8 and x9 part number details
Included Soft Error Immunity Data
Modified Ordering Information table by including parts that are available and modified
the disclaimer for the Ordering information.
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