User guide

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Galaxy MAX II Starter Kit
Galaxy Far East Corp.
The MAXII Starter kit provide a tool of enter
FPGA/CPLD world , Anybody can use Altera free web
edition software Quartus II study FPGA/CPLD design
technique more easier. The Altera’s MAXII family is a
high volume low cost product, it provide bigger logic
capacity and lower power consumption than tradition
CPLD.
Features
• Altera
 MAX II CPLD EPM1270T144C5
• 4 Digitals seven segment LED Display
• 8 Bits DIP Switch
• 4 Push Button Switchs
• 8 LEDs
• 1 x 16Mhz Oscillator
• 1 UART Connector
• 4 Extension I/O Connectors 114 I/O Pin
• 44 Pin Socket (for 3.3V 8051 CPU)
• JTAG Port Connector
Board Solutions from Third Party Board Partners
Mini FPGA Dev Kit Network daughter card EDA-004 - Altera Cyclone III
USB-FPGA board
Hangzhou Free Electron Co. Ltd
Hangzhou Free Electron Co. Ltd
Humandata Ltd.
It’s a mini dev kit for engineers who want to study
FPGA. This kit is small and the price is very low.
Two daughter card are optional for customer if they
want to develop Ethernet or Audio application.
Features
• FPGA device:EP3C5Q208C8N (upgradeable to
EP3C10)
• Configuration device: EPCS4
• RAM:512K SRAM
• DAC: 10bit, 1.25M DAC, 14bit, 165M
DAC(optional)
• ADC: 10bit, 1.25M DAC
• One LED, one SW push button, 24MHz Oscillator
• Two 24 pin expand port, each can expand 20 IO and
4 Clock
• Two daughter cards are optional for customers
• Very cheap price
This card is an option daughter card for Mini FPGA
Dev Kit.
Features
• RJ45 connector
• 10/100 Ethernet MAC/PHY
• Connects with Mini FPGA Dev Kit with 2 x 24 pin
expand port connectors
Features
• Cyclone III FPGA EP3C55F780C8N (55K LE)
• Config. ROM: EPCS16SI8N or EPCS16SI16N
• Resister-protected 100 I/O pad 2.54 mm grid
• FPGA configuration through JTAG
• FPGA configuration through USB
• User communication through USB (FT2232H
Sync-FIFO mode is available)
• 50 MHz Oscillator (50 ppm) or External input
• One User Push-Button Switch
• Tree User LEDs
• Two Status LEDs (Power, Done)
• MRAM (EVERSPIN, MR2A16AYS35 256Kx16)
• Power-on Reset signal for FPGA configuration
• JTAG port (10 pin socket) for ByteBlaster [MV/II]
or USB Blaster
• Credit-Card-Size 3.386" x 2.126" (86 x 54 mm)