Specifications
CY14C101PA
CY14B101PA
CY14E101PA
Document Number: 001-54392 Rev. *N Page 34 of 44
RTC Characteristics
Over the Operating Range
Parameter Description Min Typ
[14]
Max Units
V
RTCbat
RTC battery pin voltage 1.8 3.0 3.6 V
I
BAK
[15]
RTC backup current
(Refer Figure 32 for the recommended external
componets for RTC)
T
A
(Min) – – 0.45 µA
25 °C –0.45–µA
T
A
(Max) – – 0.60 µA
V
RTCcap
[16]
RTC capacitor pin voltage T
A
(Min) 1.6 – 3.6 V
25 °C 1.5 3.0 3.6 V
T
A
(Max) 1.4 – 3.6 V
t
OCS
RTC oscillator time to start – 1 2 sec
V
BAKFAIL
Backup failure threshold 1.8 – 2.2 V
V
DR
BPF flag retention voltage 1.6 – – V
t
RTCp
RTC processing time from end of ‘W’ bit set to ‘0’ – – 1 ms
R
BKCHG
RTC backup capacitor charge current limiting resistor 350 – 850
AC Switching Characteristics
Over the Operating Range
Parameter
[17]
Description
25 MHz
(RDRTC Instruction)
[18]
40 MHz 104 MHz
Unit
Cypress
Parameter
Alt.
Parameter
Min Max Min Max Min Max
f
SCK
f
SCK
Clock frequency, SCK – 25 – 40 – 104 MHz
t
CL
[19]
t
WL
Clock pulse width LOW 18 – 11 – 4.5 – ns
t
CH
[19]
t
WH
Clock pulse width HIGH 18 – 11 – 4.5 – ns
t
CS
t
CE
CS HIGH time 20 – 20 – 20 – ns
t
CSS
t
CES
CS setup time 10 – 10 – 5 – ns
t
CSH
t
CEH
CS hold time 10 – 10 – 5 – ns
t
SD
t
SU
Data in setup time 5 – 5 – 4 – ns
t
HD
t
H
Data in hold time 5 – 5 – 3 – ns
t
HH
t
HD
HOLD hold time 5 – 5 – 3 – ns
t
SH
t
CD
HOLD setup time 5 – 5 – 3 – ns
t
CO
t
V
Output valid – 15 – 9 – 8 ns
t
HHZ
[19]
t
HZ
HOLD to output high Z – 15 – 15 – 8 ns
t
HLZ
[19]
t
LZ
HOLD to output low Z – 15 – 15 – 8 ns
t
OH
t
HO
Output hold time 0 – 0 – 0 – ns
t
HZCS
[19]
t
DIS
Output disable time – 25 – 20 – 8 ns
Notes
14. Typical values are at 25 °C, V
CC
= V
CC(Typ)
. Not 100% tested.
15. Current drawn from either V
RTCcap
or V
RTCbat
when V
CC
< V
SWITCH.
16. If V
RTCcap
> 0.5 V or if no capacitor is connected to V
RTCcap
pin, the oscillator will start in t
OCS
time. If a backup capacitor is connected and V
RTCcap
< 0.5 V, the capacitor
must be allowed to charge to 0.5 V for oscillator to start.
17. Test conditions assume signal transition time of 3 ns or less, timing reference levels of V
CC
/2, input pulse levels of 0 to V
CC(typ)
, and output loading of the specified
I
OL
/I
OH
and load capacitance shown in Figure 34.
18. Applicable for RTC opcode cycles, address cycles and data out cycles.
19. These parameters are guaranteed by design and are not tested.