Specifications

CY14C101PA

CY14B101PA

CY14E101PA

Document Number: 001-54392 Rev. *N Page 20 of 44

FAST_RDID (Fast Device ID Read) Instruction

The FAST_RDID instruction allows you to read the JEDEC assigned manufacturer ID and product ID at SPI frequency above 40 MHz

and up to 104 MHz (Max). FAST_RDID instruction can be issued by shifting the op-code for FAST_RDID in through the SI pin of

nvSRAM followed by dummy byte after CS

goes LOW. This is followed by nvSRAM shifting out the four bytes of device ID through

the SO pin.

HOLD Pin Operation

The HOLD pin is used to pause the serial communication. When

the device is selected and a serial sequence is underway, HOLD

is used to pause the serial communication with the master device

without resetting the ongoing serial sequence. To pause, the

HOLD

pin must be brought LOW when the SCK pin is LOW. To

resume serial communication, the HOLD

pin must be brought

HIGH when the SCK pin is LOW (SCK may toggle during HOLD

While the device serial communication is paused, inputs to the

SI pin are ignored and the SO pin is in the high-impedance state.

This pin can be used by the master with the CS pin to pause the

serial communication by bringing the pin HOLD

LOW and

deselecting an SPI slave to establish communication with

another slave device, without the serial communication being

reset. The communication may be resumed at a later point by

selecting the device and setting the HOLD

pin HIGH.

Figure 28. FAST_RDID Instruction

1 0 0 1 1 0 0 1

SCK

HI-Z

0 1 2 3 4 5 6 7

16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15

8 9 10 11 12 13 14 15

MSB

4-Byte Device ID

LSB

Byte - 4 Byte - 3 Byte - 2 Byte - 1

Dummy Byte

24 25 26 27 28 29 30 31

Op-Code

Figure 29. HOLD Operation

SCK

HOLD