User`s manual

X5-GSPS XMC Module
Driving the A/D Inputs
The X5-GSPS has single-ended, DC coupled inputs that are 50 ohm terminated. The 50 ohm termination is used to match the
input cable and connector characteristic impedance. The source signal must be able to drive this input impedance to achieve
the best signal quality over the input voltage range. The signal source must be able to drive +/- 20mA for a full scale input.
Overrange Detection
The logic detects when an overrange occurs on the input by inspecting each data point. Data values of 0x80 or 0x7F are full
scale and are considered to be overrange inputs. The overrange detection can be used to trigger an alert in the logic to notify
the application when this error condition has occurred. The alert message shows when the overrange occurred in system time
and which channels overranged.
Custom logic has access to the overrange bits in the A/D interface component. Each data sample indicates when an overrange
occurs as part of its status byte appended to the data. This allows implementation of automatic gain controls for auto-ranging
external front end signal conditioning.
Sample Rate Generation and Clocking Controls
Conversion clock sources on the X5-GSPS include an external clock input and provision for an on-board oscillator. Clocks
used to drive the X5-GSPS must be extremely low jitter in order to yield good signal to noise ratio, noise floor, and spur
performance.
The following block diagram shows the organization of the clock distribution system.
CLKIN
REFIN
PLL SPI port
100 MHz
Osc
Virtex-5
J4 External
Clock Input
AD9516
PLL/Clock
Mux/Buffer
OUT
To A/D CLK
pins
(Diff Pair)
50
ohms
Y5
Figure 21. Sample Clock Generation and Distribution Block Diagram
X5-GSPS User's Manual 80