Specifications

CY7C65620
CY7C65630
Document Number: 38-08037 Rev. AB Page 9 of 32
Pin Definitions
Table 3. Pin Assignments
[3]
Pin
CY7C65630
Name
CY7C65620
Name
Type Default Description
3V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
7V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
11 V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
15 V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
19 V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
23 V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
27 V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
33 V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
39 V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
55 V
CC
V
CC
Power N/A V
CC
. This signal provides power to the chip.
4 GND GND Power N/A GND. Connect to ground with as short a path as possible.
8 GND GND Power N/A GND. Connect to ground with as short a path as possible.
12 GND GND Power N/A GND. Connect to ground with as short a path as possible.
16 GND GND Power N/A GND. Connect to ground with as short a path as possible.
20 GND GND Power N/A GND. Connect to ground with as short a path as possible.
24 GND GND Power N/A GND. Connect to ground with as short a path as possible.
28 GND GND Power N/A GND. Connect to ground with as short a path as possible.
34 GND GND Power N/A GND. Connect to ground with as short a path as possible.
40 GND GND Power N/A GND. Connect to ground with as short a path as possible.
47 GND GND Power N/A GND. Connect to ground with as short a path as possible.
50 GND GND Power N/A GND. Connect to ground with as short a path as possible.
56 GND GND Power N/A GND. Connect to ground with as short a path as possible.
21 XIN XIN Input N/A 24 MHz crystal IN or external clock input.
22 XOUT XOUT Output N/A 24 MHz crystal OUT. (NC if external clock is used)
46 RESET# RESET# Input N/A
Active LOW reset. This pin resets the entire chip. It is normally tied to
V
CC
through a 100 K resistor, and to GND through a 0.1 µF capacitor.
No other special power-up procedure is required.
45 SELFPWR SELFPWR Input N/A
Self power. Indicator for bus or self powered. 0 is bus powered, 1 is self
powered.
26 VBUSPOWER VBUSPOWER Input N/A
VBUS. Connect to the VBUS pin of the upstream connector. This signal
indicates to the hub that it is in a connected state, and may enable the
D+ pull-up resistor to indicate a connection. (The hub does so after the
external EEPROM is read).
SPI Interface
25 SPI_CS SPI_CS Output O SPI chip select. Connect to CS pin of the EEPROM.
48 SPI_SCK SPI_SCK Output O SPI clock. Connect to EEPROM SCK pin.
49 SPI_SD SPI_SD I/O/Z Z
SPI dataline connect to GND with 15 k
resistor and to the Data I/O pin
of the EEPROM.
Upstream Port
17 D– D– I/O/Z Z Upstream D– Signal.
18 D+ D+ I/O/Z Z Upstream D+ Signal.
Note
3. Unused port DD+/DD– lines can be left floating. Leave the port power, amber, and green LED pins unconnected, and deassert the overcurrent pin. Do not leave the
overcurrent pin floating; it is an input. SPI data line should be connected to GND with 15 k resistor (Even if no EEPROM is used).