Specifications

CY7C65620
CY7C65630
EZ-USB HX2LP™
Low Power USB 2.0 Hub Controller Family
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 38-08037 Rev. AB Revised January 7, 2015
EZ-USB HX2LP™ L ow Power USB 2.0 Hub Controller Family
Features
USB 2.0 hub controller
Automotive and Industrial grade option (–40 °C to 85 °C)
Compliant with USB 2.0 specification
USB-IF certified: TID# 30000009
Windows Hardware Quality Lab (WHQL) Compliant
Up to four downstream ports supported
Supports bus powered and self powered modes
Single transaction translator (TT)
Bus power configurations
Fit, form, and function compatible with CY7C65640 and
CY7C65640A (TetraHub™)
Space saving 56-pin QFN
Single power supply requirement
Internal regulator for reduced cost
Integrated upstream pull-up resistor
Integrated pull-down resistors for all downstream ports
Integrated upstream and downstream termination resistors
Integrated port status indicator control
24 MHz external crystal (integrated phase-locked loop (PLL))
In-system EEPROM programming
Configurable with external SPI EEPROM:
Vendor ID, Product ID, Device ID (VID/PID/DID)
Number of active ports
Number of removable ports
Maximum power setting for high-speed and full-speed
Hub controller power setting
Power-on timer
Overcurrent detection mode
Enabled and disabled overcurrent timer
Overcurrent pin polarity
Indicator pin polarity
Compound device
Enable full-speed only
Disable port indicators
Ganged power switching
Self and bus powered compatibility
Fully configurable string descriptors for multiple language
support
For a complete list of related documentation, click here.
Routing Logic
Hub Repeater
USB Upstream Port
USB 2.0 PHY
PLL
Serial
Interface
Engine
High-Speed
USB Control Logic
SPI Communication
Block
USB Downstream Port 1
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 2
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 3
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 4
USB 2.0
PHY
Port Power
Control
Port
Status
SPI_SCK
SPI_CS
SPI_SD
D+ D- PWR#[4]
OVR#[4]
LED
D+ D- PWR#[3]
OVR#[3]
LED
D+ D- PWR#[2]
OVR#[2]
LED
D+ D- PWR#[1]
OVR#[1]
LED
Transaction Translator
TT RAM
D+ D -
24 MHz
Crystal
Block Diagram –
CY7C65630
Errata: For information on silicon errata, see “Errata” on page 28. Details include trigger conditions, devices affected, and proposed workaround.

Summary of content (32 pages)