D O C - 0 5 1 5 - 0 1 0 , R E V A CMM-52259 Application Module for the Freescale MCF52259 Microcontroller USER GUIDE Email: www.axman.com Support: support@axman.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 CONTENTS CAUTIONARY NOTES ..............................................................................................................4 TERMINOLOGY .........................................................................................................................4 FEATURES ................................................................................................................................5 REFERENCES ...........................
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 FIGURES Figure 1: LED Indicators .............................................................................................................8 Figure 2: Supported SRAM Devices ...........................................................................................9 Figure 3: USB Configuration ..................................................................................................... 11 Figure 4: Ethernet PHY Default Configuration ..
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 CAUTIONARY NOTES 1) Electrostatic Discharge (ESD) prevention measures should be used when handling this product. ESD damage is not a warranty repair item. 2) Axiom Manufacturing does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under patent rights or the rights of others.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 FEATURES The CMM-52259 is full-featured, low-cost application module featuring the Freescale MCF52259 microcontroller. This module is available in 3 configurations; the CMM-52259OEM consists of the board only, the CMM-52259-DEV consists of the board and supporting cables, the CMM-52259-DEV-BDM consists of the board, supporting cables, and an AxBDM. In default configurations, the board is built with only the BDM_PORT header installed.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 REFERENCES Reference documents are provided on the support CD in Acrobat Reader format. CMM-52259_UG.pdf CMM-52259_SCH_A.pdf CMM-52259_Silk_A.pdf CFPRM.pdf CMM-52259-Test.zip CMM-52259 User Guide (this document) CMM-52259 Schematic CMM-52259 Top Silkscreen ColdFire Programmers Reference Manual CodeWarrior Project using MQX RTOS GETTING STARTED To get started quickly, please refer to the CMM-52259 Quick Start Guide.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 NOTE: At this time, the MCF52259 unsecure function is supported using the P&E BDM only. The AxBDM can not be used to unsecure the MCU. When using the P&E unsecure function set the BUS frequency to 1333333 Hz. POWER Power to the CMM-52259 is applied at a 2.1mm, center-positive, barrel connect at J8. Input voltage is limited to the range of +7V to +34V. Insufficient or excessive input voltage may cause damage the board.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 input, IRQ7* becomes a non-maskable, edge-sensitive input. If this input is used as GPIO the user application must configure functionality. LED INDICATORS The CMM-52259 provides 4 LED indicators; power supply status, reset status, and ethernet status. The LED indicators provide board status. Figure 1 below shows the different LED states. Figure 1: LED Indicators LED RESET +3.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 Internal SRAM Internal, dual-ported, SRAM connects to the MCF52259’s internal high-speed local bus and supports DMA, FEC, and USB access. The SRAM is partitioned into two physical memory arrays allowing simultaneous access to arrays by the processor core and another bus master. The user application can locate SRAM memory 64k boundary within the target device’s 4 GB address space.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 NOTE: Do not use FB_CS0*/PQS3 in GPIO mode on Rev A boards. FB_CS0* is dedicated to on-board external SRAM and can not be disconnected. In GPIO mode, driving FB_CS0*/PQS3 low will cause contention on other external bus signals. Mini-FlexBus chip select, FB_CS1*, is available for use with off-board external memory and provides access to 1Mb (128k x 8) of storage space.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 Device Mode The CMM-52259 may act as either a bus-powered or a self-powered device. As a buspowered device, the CMM-52259 will take input voltage and current through the USB connector. As a self-powered device, the CMM-52259 must be powered through the barrel connector. The VBUS input is designed to prevent back-driving VBUS if the board is powered externally.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 NOTE: To conform to the USB standard, DM and DP pull-downs must be applied in Host Mode configuration. NOTE: For Device Mode applications, apply DP pull-up for Full-Speed applications or DM pullup for Low-Speed applications. Do not apply both DM pull-up and DP pull-up simultaneously. Ethernet The CMM-52259 applies a 10/100 Mbps Ethernet / IEEE 802.3 communications port.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 Fast Ethernet Controller (FEC) The MCF52259 internal Media Access Controller (MAC) supports 10/100 Mbps Ethernet / IEEE802.3 network connections. User application must configure the MAC for Media Independent Interface (MII) operation before use. The MAC supports both full- and half-duplex operation. UART The CMM-52259 applies 3 RS-232, UART channels.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E 1 1 , 2 0 1 0 while supporting communications rates to 1 Mbaud. The PHY provides slope control reducing radio frequency interference (RFI) while providing a wide common-mode range input protecting against electro-magnetic interference (EMI). The PHY also provides short-circuit protection to battery and ground. Refer to the PCA82C250 data sheet for further details. The FlexCAN module in the MCF52259 provides support for the CAN protocol.
C M M - 5 2 2 5 9 U S E R G U I D E J U N E Figure 8: BUS_PORT IO Header BUS_PORT CMM – J2 2 FB_D1/SYNCA/PTG6 FB_D0/SYNCB/PTG7 1 4 FB_D3/USB_VBUSD/PTH1 FB_D2/USB_VBUSE/PTH0 3 6 FB_D5/I2C_SDA/PTH3 FB_D4/I2C_SCL1/PTH2 5 7 8 FB_D7/CANRX/PTH5 FB_D6/CANRX/PTH4 FB_AD00/PTE0 9 10 FB_AD01/PTE1 FB_AD02/PTE2 11 12 FB_AD03/PTE3 FB_AD04/PTE4 13 14 FB_AD05/PTE5 FB_AD06/PTE6 15 16 FB_AD07/PTE7 FB_AD08/PTF0 17 18 FB_AD09/PTF1 FB_AD10/PTF2 19 20 FB_AD11/PTF3 FB_AD12/PTF4 21 22 FB_AD13/PTF5 FB_AD14/PTF6 23 24 FB_AD15/PTF7
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