Specifications

CY14B256K
Document Number: 001-06431 Rev. *G Page 17 of 24
AutoStore or Power Up RECALL
Parameter Description
CY14B256K
Unit
Min Max
t
HRECALL
[15]
Power Up RECALL Duration 20 ms
t
STORE
[16, 17]
STORE Cycle Duration 12.5 ms
V
SWITCH
Low Voltage Trigger Level 2.65 V
t
VCCRISE
VCC Rise Time 150 μs
Software Controlled STORE/RECALL Cycles
[18, 19]
Parameter Description
25 ns Part 35 ns Part 45 ns Part
Unit
Min Max Min Max Min Max
t
RC
STORE/RECALL Initiation Cycle Time 25 35 45 ns
t
AS
Address Setup Time 0 0 0 ns
t
CW
Clock Pulse Width 20 25 30 ns
t
GHAX
Address Hold Time 1 1 1 ns
t
RECALL
RECALL Duration 100 100 100 μs
t
SS
[20, 21]
Soft Sequence Processing Time 70 70 70 μs
Hardware STORE Cycle
Parameter Description
CY14B256K
Unit
Min Max
t
DELAY
[22]
Time Allowed to Complete SRAM Cycle 1 70 μs
t
HLHX
Hardware STORE Pulse Width 15 ns
Notes
15. t
HRECALL
starts from the time V
CC
rises above V
SWITCH
.
16. If an SRAM Write does not taken place since the last nonvolatile cycle, no STORE takes place.
17. Industrial Grade Devices require 15 ms Max
18. The software sequence is clocked with CE
controlled or OE controlled READs.
19. The six consecutive addresses are read in the order listed in the Table 1 on page 5. WE
is HIGH during all six consecutive cycles.
20. This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command.
21. Commands such as STORE and RECALL lock out IO until operation is complete which further increases this time. See specific command.
22. Read and Write cycles in progress before HSB
are given this amount of time to complete.
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