User guide
98 CY3687 MoBL-USB FX2LP18 Development Kit User Guide, Doc. # 001-68582 Rev. *B
Resources
Hex2bix is a program used to convert a .hex file to a raw binary, A51, or IIC format. This applica-
tion note describes how to use the Hex2bix conversion utility for successful file conversion.
■ AN15456 - Guide to Successful EZ-USB(R) FX2LP(TM) and EZ-USB FX1(TM) Hardware Design
and Debug
This application note outlines a process that isolates many of the most likely causes of EZ-USB®
FX2LP™ and EZ-USB FX1™ hardware problems. It also facilitates the process of catching
potential problems before building a board and assists in the debugging when getting a board up
and running.
■ AN5078 - EZ-USB Hardware - Design considerations for EEPROM usage
EZ-USB
®
downloads firmware automatically into the on-chip RAM from the EEPROM connected
to it. The purpose of this application note is to present recommended design guidelines for assur-
ing the data integrity of serial EEPROM devices when used in EZ-USB designs.
■ AN064 - EZ-USB FX2LP™/AT2LP™ Reset and Power Considerations
The Cypress EZ-USB FX2LP(TM) is a USB 2.0 high-speed device. It contains an 8051, 16K of
program/data memory, 4K of endpoint buffers and a General Programmable Interface (GPIF)
block. The EZ-USB AT2LP(TM) is a USB 2.0 high-speed ATA/ATAPI bridge chip. Both these
chips have similar power and reset needs. This application note refers to the FX2LP, but is also
applicable to AT2LP.
■ AN15813 - Monitoring the EZ-USB FX2LP
™
VBUS
This application note explains the purpose and methods of monitoring VBUS from the upstream
connector using the EZ-USB FX2LP.
■ AN43841 - EZ-USB
®
FX2LPTM/FX2LP18 56-Ball BGA PCB Layout Guidelines
The 56-ball VFBGA version of the FX2LP(CY7C68013A) or FX2LP18(CY7C68053) USB micro-
controller chips is a smaller package version of the QFN package. The 56-ball package meets the
needs of space sensitive printed circuit board (PCB) designs. This application note provides
guidelines for designing a PCB with either FX2LP(CY7C68013A) or FX2LP18(CY7C68053).
■ AN4067 - Endpoint FIFO Architecture of EZ-USB FX1/FX2LP™
This application note describes the FIFO architecture of the EZ-USB FX1, the full speed USB
microcontroller and the EZ-USB FX2LP"·, the high-speed USB microcontroller. The purpose of
this application note is to help the user understand the very basics of the FX1/FX2LP and get
familiar with the terminologies used while describing the data flow in FX1/FX2LP. The application
note addresses three modes of operation of the FX1/FX2LP, Endpoint Configuration and Multiple
Buffering, Three Domains that form the basic component of the FIFO architecture, Arming and
committing endpoint buffers Endpoint operation in manual vs. auto mode.
■ AN4053 - Streaming Data Through Isochronous/Bulk Endpoints on EZ-USB® FX2™ and EZ-
USB FX2LP™
This application note provides brief background information on what is involved while designing
for a streaming application using the EZ-USB FX2(TM) or the EZ-USB FX2LP(TM) part. It pro-
vides information on streaming data through bulk endpoints, isochronous endpoints, and high-
bandwidth isochronous endpoints along with pitfalls to consider and avoid while using the FX2/
FX2LP for designing high-bandwidth applications.
■ AN67442 - SPI Implementation Using Serial Mode-0 of EZ-USB FX2LP™
This application note describes the implementation of serial peripheral interface (SPI) protocol
using the FX2LP UART port in serial mode 0. This demonstration uses FX2LP as the SPI master
for transferring data to and from an AT25080A EEPROM device. The example code includes
functions to the Write/Read byte to and from AT25080A EEPROM.
■ AN58069 - Implementing an 8-Bit Parallel MPEG2-TS Interface Using Slave FIFO Mode in
FX2LP