User's Manual

CYBLE-212019-00
Document Number: 002-09764 Rev. ** Page 8 of 31
Table 4 details the solder pad connection definitions and available functions for each connection pad. Table 4 lists the solder pads on
CYBLE-212019-00, the BLE device port-pin, and denotes whether the function shown is available for each solder pad. Each
connection is configurable for a single option shown with a 3.
Table 4. Solder Pad Connection Definitions
Solder Pad
Number
Device
Port Pin
UART SPI I
2
C TCPWM
[2]
CapSense
WCO
Out
ECO_OUT LCD SWD GPIO
1 XRES External Reset Hardware Connection Input
2P4.0
[3]
3(RTS) 3(MOSI) 33(C
MOD
) 33
3P3.73(CTS) 33(Sensor) 33 3
4P3.63(RTS) 33(Sensor) 33
5P3.53(TX) 3(SCL) 33(Sensor) 33
6P3.43(RX) 3(SDA) 33(Sensor) 33
7P3.33(CTS) 33(Sensor) 33
8P3.23(RTS) 33(Sensor) 33
9P2.6 3(Sensor) 33
10 VREF Reference Voltage Input (Optional)
11 P2.4
3(Sensor) 33
12 P2.3 3(Sensor) 33 3
13 P2.2 3(SS) 3(Sensor) 33
14 P2.0 3(SS) 3(Sensor) 33
15 V
DD
Digital Power Supply Input (1.8 to 5.5V)
16 P1.7
3(CTS) 3(SCLK) 33(Sensor) 33
17 P1.6 3(RTS) 3(SS) 33(Sensor) 33
18 P1.5 3(TX) 3(MISO) 3(SCL) 33(Sensor) 33
19 P1.4 3(RX) 3(MOSI) 3(SDA) 33(Sensor) 33
20 P1.0 33(Sensor) 33
21 P0.4 3(RX) 3(MOSI) 3(SDA) 33(Sensor) 33 3
22 P0.5 3(TX) 3(MISO) 3(SCL) 33(Sensor) 33
23 P0.7 3(CTS) 3(SCLK) 33(Sensor) 33(SWDCLK) 3
24 P0.6 3(RTS) 3(SS) 33(Sensor) 33(SWDIO) 3
25 GND
[4]
Ground Connection
26 GND Ground Connection
27 GND Ground Connection
28 GND Ground Connection
29 V
DDR
Radio Power Supply (1.9V to 5.5V)
30 P5.0
3(RX) 3(SS) 3(SDA) 33(Sensor) 33
31 P5.1 3(TX) 3(SCLK) 3(SCL) 33(Sensor) 33 3
Notes
2. TCPWM: Timer, Counter, and Pulse Width Modulator. If supported, the pad can be configured to any of these peripheral functions.
3. When using the capacitive sensing functionality, Pad 2 (P4.0) must be connected to a C
MOD
capacitor (located off of Cypress BLE Module). The value of this
capacitor is 2.2 nF and should be placed as close to the module as possible.
4. The main board needs to connect all GND connections (Pad 25/26/27/28) on the module to the common ground of the system.
5. If the I
2
S feature is used in the design, the I
2
S pins shall be dynamically routed to the appropriate available GPIO by PSoC Creator