User's Manual

WD105
Datasheet
2014-03-20
12
Pin No. Pin name Description Genernal Type
24 UART2_TXD|I2S1_SDI UART2 Series Output. O
25 UART2_RXD|TRST_7x7|I2S1_SDO UART2 Series Input. I
26 Ground Ground P
27 EXT_ANT option for external RF path, default not enable RF I/O
Table 1-1: Pin Definitions : SPI
Pin No. Pin name
Host Interface
function1-SPI
function1 type
8 SPI_CLK|SD_CLK|I2S2_MCK SPI Clock I/O
11 SPI_MISO|SD_DATA0|I2S2_WS|JTAG_EN SPI MISO O
14 SPI_INT|SD_DATA1|I2S2_SDO SPI INT I/O
16 SPI_MOSI|SD_DATA3|I2S2_BCK SPI MOSI I
17 SPI_CS|SD_CMD|HM1 SPI CS I
Table 1-2: Pin Definitions : SDIO
Pin No. Pin name Host Interface function1-SDIO function2 type
8 SPI_CLK|SD_CLK|I2S2_MCK SDIO Clock I/O
11 SPI_MISO|SD_DATA0|I2S2_WS|JTAG_EN SDIO Data Line 0. I/O
14 SPI_INT|SD_DATA1|I2S2_SDO SDIO Data Line 1. I/O
15 SD_DATA2|I2S2_SDI|HM0 SDIO Data Line 2. I/O
16 SPI_MOSI|SD_DATA3|I2S2_BCK SDIO Data Line 3. I/O
17 SPI_CS|SD_CMD|HM1 SDIO command line I/O