User`s manual

CyberResearch
®
CPU Cards CZGG LU-10-X Series
CyberResearch, Inc. 119
25 Business Park Drive P: (203) 483-8815; F: (203) 483-9024
Branford, CT USA www.cyberresearch.com
The Configure DRAM Timing by SPD determines if the system uses the SPD (Serial
Presence Detect) EEPROM to configure the DRAM timing. The SPD EEPROM contains
all necessary DIMM specifications the including speed of the individual components such
as CAS and bank cycle time as well as valid settings for the module and the
manufacturer's code. The SPD enables the BIOS to read the spec sheet of the DIMMs on
boot-up and then adjust the memory timing parameters accordingly.
Manual
DRAM timing parameters can be manually set
using the DRAM sub-items
Auto by SPD
(Default) DRAM timing parameter are set according to
the DRAM Serial Presence Detect (SPD)
Turbo
Ultra
The Configure DRAM Timing by SPD option is disabled, the following configuration
options appear.
SDRAM CAS# Latency [2.5]
SDRAM Bank Interleave [Disabled]
Precharge to Active (Trp) [4T]
Active to Precharge (Tras) [9T]
Active to CMD (Trcd) [4T]
REF to ACT/REF to REF(Trfc) [15T]
ACT (0) ti ACT (1) (Trrd) [3T]
DRAM Command Rate [2T Command]
2T Command
(Default)
1T Command
5.8.1.2 AGP Features Configuration
The AGP Features Configuration menu (BIOS Menu 20) configures the AGP settings.