User`s manual

CyberResearch
®
CPU Cards CZGA LX-50
CyberResearch, Inc. 27
25 Business Park Drive P: [phone]; F: [phone]
Branford, CT USA www.cyberresearch.com
The keyboard and mouse controller controller is interfaced to a keyboard and mouse
connected to the backplane through the board-to-board connectors.
2.6.3.7 Super I/O GPIO Ports
 The Super I/O has 22 programmable GPIO ports.
2.7 PCI Bus Components
2.7.1 GeodeLink™ PCI Bridge Overview
The GeodeLink™ PCI Bridge (GLPCI) module provides a PCI interface for GeodeLink
Interface Unit-based designs. The GLPCI module is composed of six major blocks:
 GeodeLink Interface
 FIFO/Synchronization
 Transaction Forwarding
 PCI Bus Interface
 PCI Arbiter
The GeodeLink and PCI Bus Interface blocks provide adaptation to the respective buses.
The Transaction Forwarding block provides bridging logic. Some of the features of the
GeodeLink™ PCI Bridge are listed below:
 PCI Version 2.2 compliance
 32-bit, 66 MHz PCI bus operation
 Target support for fast back-to-back transactions
 Arbiter support for three external PCI bus masters
 Write gathering and write posting for in-bound write requests
 Virtual PCI header support
 Delayed transactions for in-bound read requests
 Zero wait state operation within a PCI burst
 Dynamic clock stop/start support for GLIU and PCI clock domains (this is not
CLKRUN support)
 Capable of handling out of bound transactions immediately after reset
The PCI bus is connected to components listed below: