Specifications
Status
Bits
2=1
3=1
o 6-28
Status
Interrupt
Alarm
Description
• Director functions:
Read. write. compare.
check-word
check,
wri
te
address, sense-verify.
• Wait for seek change.
• Seek to device.
Busy
status
is
cleared upon
completion of the command
which caused
the
controller
to
become busy. Master
clear
or
clear controller will also clear
busy.
EOP
or alarm or
alternate
bus
reg interrupt response is active.
The
bi
t
is
reset
by
clear
interrupts. master clear. or clear
controller.
One of the following abnormal
conditions occurred:
• Not ready during a director
function operation.
• Checkword error.
• Lost data.
• Controller seek error.
• Drive seek error during
director function operation.
•
DMA
parity error.
•
DMA
protect
fault.
•
Bus
relinquished.
•
DMA
address error.
• Compare error.
•
End
of medium.
• Missing index sector pulses.
• Wrong
sector
format.
• Wrong device transfer.
• Not on-cylinder during
director function operation.
• F aul t occurs
during
operation on
COD.
This bit is reset upon acceptance
of any
new
command which
causes the controller
to
become
busy.
It
is
also
reset
by clear
controller
or
master clear.
Status
Bits
4=1
5=1
6
7=1
8=1
9
Status
On-Cylinder
Description
The heads are positioned over
the
cylinder selected. The
bi
t
is
reset
if the drive
is
still
positioning
the
heads or if a seek
error is
detected.
Disk Write The unit's
WRITE
PROTECT
Protected switch is
ON
and all write
functions
are
inhibi ted
by
the
unit.
Not used
Single Density The selected
COD
is
a single
density unit
(203 tracks).
When
this bit
is
zero,
it
indicates
that
the
CDD
is a double density unit
(406
tracks).
EOP
The previous operation has been
completed.
Not used
10
Not used
11
12=1
13=1
14=1
15=1
Not used
On
bus
Device
Seek
Error
Controller
Protected
Bus
Busy
This
COD
controller has control
of the bus and can
access the
disks.
If
this bit is zero,
it
indicates
that
this
COO
controller is not using the disks.
The heads have moved
to
an
illegal address, or a seek was not
completed within
200 milliseconds.
A
protected
unit
is
selected.
The controller will reject all
unprotected
OUTPUT
instructi ons.
Deselecting
the
Protected Unit
or selecting a non-protected unit
will
clear
this
bi
t.
If
both this bit and bit
12
are
set,
this
COD
controller has control
on
the
bus and the other
COD
controller is sending a bus
request.
If
this
bit
is
set
and bit
12
is
not
set.
the
other
COD
controller
has control on the bus.
This
bi
t
is
reset
upon
release or
relinquishment of the bus.
96769450 B