Datasheet

20050 SW 112
th
Ave. Tualatin, Oregon 97062 phone [phone] fax [phone]
7.6 Input Capacitance at the Power Module
The VPOL16A-12-SIP converters must be connected to a low AC
source impedance. To avoid probl ems with loop stability source
inductance should be low. Also, the input capacitors should be placed
close to the converter input pins to de-couple distribution inductance.
However, the external input capacitors are chosen for suitable ripple
handling capability. Low ESR polymers are a good choice. They have
high capacitance, high ripple rating and low ESR (typical <100mohm).
Electrolytic capacitors should be avoided. Circuit as shown in Figure 10
represents typical measurement methods for ripple current. Input
reflected-ripple current is measured with a simulated source Inductance
of 1uH. Current i
s measured at the input of the module.
+Vin
Common
VPOL16A-12-SIP
220uF
ESR<0.1ohm
2*100uF
Tantalum
L1
1uH
+Power
Supply
To Oscilloscope
Figure 10. Input Reflected-Ripple Test Setup
7.7 Test Set-Up
The basic test set-up to measure parameters such as efficiency and
load regulation is shown in Figure 11. Things to note are that this
converter is non-isolated, as such the input and output share a common
ground. These grounds should be connected together via low
impedance ground plane in the application circuit. When testing a
converter on a bench set-up, ensure that -V
in and -Vo are connected
together via a low impedance short to ensure proper efficiency and load
regulation measurements are being made. When testing the CUI INC's
VPOL16A-12-SIP series under any transient conditions please ensure
that the transient response of the source is sufficient to power the
equipment under test. We can calculate the
E
fficiency
Load regulation and line regulation.
The value of efficiency is defined as:
%100
IinVin
IoVo
Where: Vo is output voltage,
Io is output current,
Vin is input voltage,
Iin is input current.
The value of load regulation is defined as:
%100.
NL
NLFL
V
VV
reg=Load
Where: V
FL
is the output voltage at full load
V
NL
is the output voltage at no load
The value of line regulation is defined as:
%100.
LL
LLHL
V
VV
reg=Line
Where: V
HL
is the output voltage of maximum input voltage at full load.
V
LL
is the output voltage of minimum input voltage at full load.
+Vin
Common
100uF
+
Power
Supply
A
V
Current Meter
Voltage Meter
+Vo
Common
+Sense
Load
V
A
Figure 11. VPOL16A-12-SIP Series Test Setup
7.8 Remote Sense Compensation
Remote Sense regulates the output voltage at the point of load. It
minimizes the effects of distribution losses such as drops across the
connecting pin and PCB tracks (see Figure 12). Please note however,
the maximum drop from the output pin to the point of load should not
exceed 500mV for remote compensation to work.
The amount of power delivered by the module is defined as the output
voltage multiplied by the output current (VO x IO).
When using TRIM UP, the output voltage of the module will increase
which, if the same output current is maintained, increases the power
output by the module. Make sure that the maximum output power of the
module
remains at or below the maximum rated power.
When the Remote Sense feature is not being used, leave sense pin
disconnected.
Figure 12. Circuit Configuration for Remote Sense Operation
+Vin
Common Common
+Vo
Distribution Losses
R-Load
+Sense
Distribution Losses
VPOL16A-12-SIP
x
x
x
ç =
x
_
x
_
rev.
rev.
page
date
DESCRIPTION: point of load converter
10 of 12
08/2007
PART NUMBER: VPOL16A-12-SIP
For more information, please visit the product page.