Datasheet
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CUI Inc │ SERIES: PYB30-U │ DESCRIPTION: DC-DC CONVERTER date 08/18/2014 │ page 6 of 7
1. Recommended circuit
This series has been tested according to the following recommended testing circuit before leaving the factory. This series should be
tested under load (see Figure 3). If you want to further decrease the input/output ripple, you can increase the capacitance accord-
ingly or choose capacitors with low ESR (see Table 3). However, the capacitance of the output lter capacitor must be appropriate. If
the capacitance is too high, a startup problem might arise. For every channel of the output, to ensure safe and reliable operation, the
maximum capacitance must be less than the maximum capacitive load (see Table 4).
DC DC
Vin
GN
D
+Vo
0V
Cin
Cout
Vi n
GND
+V
o
0V
Cin
Cout
DC DC
-Vo
Cout
DC DC
Vin
GND
Vo2
Cout
0V
Cout
Cout
Vo1
C in
-Vo2
Single Output Dual Output
Triple Output
APPLICATION NOTES
Figure 3
Figure 4
Note: 1. Minimum load shouldn't be less than 5%, otherwise ripple may increase dramatically. Operation under minimum load will not damage the converter, however, they may
not meet all specications listed.
2. Maximum capacitive load is tested at input voltage range and full load.
3. All specications are measured at Ta=25°C, humidity<75%, nominal input voltage and rated output load unless otherwise specied.
Vout
(Vdc)
R1
(kΩ)
R2
(kΩ)
R3
(kΩ)
Vref
(V)
5 2.883 2.864 10 2.5
12 10.971 2.864 17.8 2.5
15 14.497 2.864 17.8 2.5
+Vo
0V
R
2
R
1
R
3
V
re f
R
T
Trim
0V
R
2
R
1
R
3
V
ref
R
T
Tr
im
+Vo
Tr im up
Tr im down
a
-a
R
2
a
R 1
R2
-a
R1
-R3
-R3
: a=
Vref
Vref
Vo’ - Vref
Vo’ - Vref
R
1
R=
T
:
a=
R
2
R=
T
up
dow
n
Note: Value for R1, R2, R3, and Vref refer to Table 5
R
T
: Trim Resistor
a: User-dened parameter, no actual meanings
Vo
'
: The trim up/down voltage
Application Circuit for Trim pin
(part in broken line is the interior of models)
Formula for Trim Resistor
2. Output voltage trimming
Leave open if not used.
Table 5
Single
Vout
(Vdc)
Max.
Capacitive
Load
(μF)
Dual
Vout
(Vdc)
Max.
Capacitive
Load
1
(μF)
Triple
Vout
(Vdc)
Max.
Capacitive
Load
1
(μF)
-- -- -- -- 3.3/±12 4700/300
5 6000 5 2000 3.3/±15 4700/220
12 2500 12 1250 5/±12 4700/300
15 1100 15 680 5/±15 4700/220
Table 3 Table 4
Single
Vout
(Vdc)
Cin
(µF)
Cout
(µF)
Dual
Vout
(Vdc)
Cin
(µF)
Cout
1
(µF)
Triple
Vout
(Vdc)
Cin
(µF)
Cout
1
(µF)
-- -- -- -- -- -- 3.3 10 10
5 10 10 ±5 10 10 5 10 10
12 10 4.7 ±12 10 4.7 ±12 10 4.7
15 10 4.7 ±15 10 4.7 ±15 10 4.7
Note: 1. For each output.
Note: 1. For each output.
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