Specifications
www.digikey.com/maxim-industrial 37
Programmable logic controllers (PLCs)
CPU functions
Benefits
• Improved system security
– Crypto-strong authentication based on
FIPS 180-3-defined SHA-1
– Sophisticated physical security protects
against die-level attacks
– Protected NV EPROM or one-time-
programmable (OTP) memory for data
storage
– Optional, confidential preprogramming
of customer-defined secure data by
Maxim*
• Minimal I/O pin and resource impact on
the FPGA or CPU design
– Consumes only one I/O pin for total
operation
– Single dedicated contact for communi-
cation and power
– Small code/gate/memory footprint for
CPU and FPGA implementation
DS28E01-100, DS28E02, DS28E10
1-Wire secure memories utilize a SHA-1-based, crypto-strong, secure
challenge-and-response authentication sequence. Thus authentica-
tion enables FPGAs and CPUs to differentiate between authorized
and cloned environments. The determination of authorized or cloned
either sets the system to normal operation, or disables the module
to protect the design investment from being copied. Additionally,
module operational features set with EPROM data values are SHA-1
protected against unauthorized modification.
1-Wire SHA-1 authenticators securely protect control modules from unauthorized
cloning or feature modification
Block diagram of FPGA secure authentication using a 1-Wire secure memory device.
FPGA
µP
FLASH
MEMORY
Upon power-up, the FPGA sends
a random challenge to the secure
memory, which responds with a
SHA-1 MAC corresponding to the
random challenge.
The FPGA compares the expected
response to the actual response and
tells the µC which system setting to
apply (including disable).
1-Wire
SECURE
MEMORY
* For more information, please see: application note 4594, “Protect Your FPGA Against Piracy: Cost-Effective Authentication Scheme Protects IP in SRAM-Based FPGA Designs”;
application note 3826, “Xilinx
®
FPGA IFF Copy Protection with 1-Wire
®
SHA-1 Secure Memories”; and 1-Wire FPGA Security Flash™ Tutorial FPGA Security, Flash™ tutorial.