Datasheet

Crameda Intersys AG CC-DS-E-0011
Pumpwerkstrasse 23 Seite : 7
CH-8105 Regensdorf · Schweiz http://www.crameda.com
V
CC
Length of storage instruction tw 5 min. 400 ns
10 min. 160 ns
15 min. 100 ns
Length of setting time ts 5 min. 150 ns
10 min. 70 ns
15 min. 40 ns
Length of holding time tn 5 min. 75 ns
10 min. 35 ns
15 *min. 20 ns
Output data (RBO only)
Output data
U
out
«0» with I
out
= 3.2 mA max. 0.4 V
U
out
«1» with I
out
= -80 µA min. 2.4 V
Output current
I
out
«0» max. 3.2 mA
l
out
«1» max. -80 µA
Description of Enable Latch (EL) and Decimal Point (DP):
EL (Enable Latch): This instruction will freeze the display
and suppress further response to
changes of the BCD input.
«EL» on «0» The display responds
to the BCD input value
«EL» on «1» The display freezes
TTL logic: «DP» on «0» Decimal point on
«DP» on «1» Decimal point off
CMOS logic: «DP» on «0» Decimal point off
«DP» on «1» Decimal point on
Truth table
Inputs Outputs
EL
RBI
(TTL
only)
C
2
2
B
2
1
A
2
0
LT
(CMOS
only)
BI**
RBO
(TTL
only)
Display
x x x x x 0 1 1 +1 (Test)
x x x x x 1 0 0 none
0 0 0 0 0 1 0 0 none
0 1 0 0 0 1 1 1 +1
0 x 0 0 1 1 1 1 -
0 x 0 1 0 1 1 1 1
0 x 0 1 1 1 1 1 -1
0 x 1 0 0 1 1 1 +
0 x 1 0 1 1 1 1 +1
0 x 1 1 0 1 1 1 +1
0 x 1 1 1 1 1 1 -
1 x x x x 1 1 1
stored*
x = «0» or «1»
* Controlled by applied BCD code during the leading edge
of the «EL» instruction signal.
** Input BI should only be shifted to «0» to obtain blanking
of the display irrespective of the BCD input. Further
information on this input is provided in the general data
section.
Type VDC Ordering code
806, 5 V, TTL 806-010-21
806, 5 V, CMOS 806-020-21
806, 12 V, CMOS 806-025-21
Data may vary Data may vary
Data must
be stable