Datasheet

Crameda Intersys AG CC-DS-E-0011
Pumpwerkstrasse 23 Seite : 5
CH-8105 Regensdorf · Schweiz http://www.crameda.com
Output data (RBO only)
Output data
U
out
«0» with l
out
= 3.2 mA max. 0.4 V
U
out
«1» with I
out
= -80 µA min. 2.4 V
Output current
l
out
«0» max. 3.2 mA
I
out
«1» max. -80 µA
Description for Enable Latch (EL) and Decimal Point (DP):
This instruction will freeze the display
and suppress further response to
changes of the BCD input
«EL» on «0» The display responds to
the BCD input value.
«EL» on «1» The display freezes
DP (Decimal point): The decimal point must be controlled
externally. The module features an
integral current limiting resistor.
TTL logic: «DP» on «0» Decimal point on
«DP» on «1» Decimal point off
CMOS logic: «DP» on «0» Decimal point off
«DP» on «1» Decimal point on
Truth table
CMOS logic
Inputs Outputs
EL LT
D
2
3
C
2
2
B
2
1
A
2
0
BI Display
x 0 x x x x x 8 (Test)
x 1 x x x x 0 none
0 1 0 0 0 0 1 0
0 1 0 0 0 1 1 1
0 1 0 0 1 0 1 2
0 1 0 0 1 1 1 3
0 1 0 1 0 0 1 4
0 1 0 1 0 1 1 5
0 1 0 1 1 0 1 6
0 1 0 1 1 1 1 7
0 1 1 0 0 0 1 8
0 1 1 0 0 1 1 9
1 1 x x x x 1 stored*
x = «0» or «1»
* Controlled by applied BCD code during the leading edge
of the «EL» instruction signal.
TTL logic
Inputs Outputs
EL RBI
D
2
3
C
2
2
B
2
1
A
2
0
BI** RBO Display
x x x x x x 0 0 none
0 0 0 0 0 0 x 0 none
0 1 0 0 0 0 1 1 0
0 x 0 0 0 1 1 1 1
0 x 0 0 1 0 1 1 2
0 x 0 0 1 1 1 1 3
0 x 0 1 0 0 1 1 4
0 x 0 1 0 1 1 1 5
0 x 0 1 1 0 1 1 6
0 x 0 1 1 1 1 1 7
0 x 1 0 0 0 1 1 8
0 x 1 0 0 1 1 1 9
0 x 1 0 1 0 1 1 A
0 x 1 0 1 1 1 1 b
0 x 1 1 0 0 1 1 C
0 x 1 1 0 1 1 1 d
0 x 1 1 1 0 1 1 E
0 x 1 1 1 1 1 1 F
1 x x x x x 1 1 stored*
x = «0» or «1»
* Controlled by the applied BCD code during the leading
edge of the «EL» instruction signal.
** Input BI should only be shifted to «0» to obtain blanking
of the display irrespective to the BCD input. Further
information on this input is provided in the general data
section.
Type VDC Ordering code
805, 5 V, TTL 805-010-21
805, 5 V, CMOS 805-020-21
805, 12 V, CMOS 805-025-21