System information

Table 4-3. CPU Registers

C Carry flag (0/1)

Z Zero flag (0/1)

M Minus flag (0/1)

E Even parity flag (0/1)

I lnterdigit carry (0/1)

A Accumulator (0-FF)

B BC register pair (0-FFFF)

D DE register pair (0-FFFF)

H HL register pair (0-FFFF)

S Stack pointer (0-FFFF)

P Program counter (0-FFFF)

In the first case, the CPU register state is displayed in the format:

CfZfMfEflf A=bb B=dddd D=dddd H=dddd S=dddd P=dddd inst

where f is a 0 or 1 flag value, bb is a byte value, and dddd is a double-byte quantity

corresponding to the register pair. The inst field contains the disassembled instruction, that

occurs at the location addressed by the CPU state's program counter.

The second form allows display and optional alteration of register values, where r is one of the

registers given above (C, Z, M, E, I, A, B, D, H, S, or P). In each case, the flag or register value is

first displayed at the console. The DDT program then accepts input from the console. If a

carriage return is typed, the flag or register value is not altered. If a value in the proper range is

typed, the flag or register value is altered. You should note that BC, DE, and HL are displayed as

4.3 Implementation Notes

The organization of DDT allows certain nonessential portions to be overlaid to gain a larger

transient program area for debugging large programs. The DDT program consists of two parts:

the DDT nucleus and the assembler/disassembler module. The DDT nucleus is loaded over the

CCP and, although loaded with the DDT nucleus, the assembler/disassembler is overlayable

unless used to assemble or disassemble.

4.2 DDT Commands CP/M Operating System Manual

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