Parts List/Tune Up Info

8
CC2642R
SWRS194G –JANUARY 2018 – REVISED APRIL 2020 www.ti.com
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Terminal Configuration and Functions
Copyright © 2018–2020, Texas Instruments Incorporated
(1) For more details, see technical reference manual listed in Section 8.2.
(2) Do not supply external circuitry from this pin.
(3) EGP is the only ground connection for the device. Good electrical connection to device ground on printed circuit board (PCB) is
imperative for proper device operation.
4.2 Signal Descriptions – RGZ Package
Table 4-1. Signal Descriptions – RGZ Package
PIN
I/O TYPE DESCRIPTION
NAME NO.
DCDC_SW 33 — Power Output from internal DC/DC converter
(1)
DCOUPL 23 — Power For decoupling of internal 1.27 V regulated digital-supply
(2)
DIO_0 5 I/O Digital GPIO
DIO_1 6 I/O Digital GPIO
DIO_2 7 I/O Digital GPIO
DIO_3 8 I/O Digital GPIO
DIO_4 9 I/O Digital GPIO
DIO_5 10 I/O Digital GPIO, high-drive capability
DIO_6 11 I/O Digital GPIO, high-drive capability
DIO_7 12 I/O Digital GPIO, high-drive capability
DIO_8 14 I/O Digital GPIO
DIO_9 15 I/O Digital GPIO
DIO_10 16 I/O Digital GPIO
DIO_11 17 I/O Digital GPIO
DIO_12 18 I/O Digital GPIO
DIO_13 19 I/O Digital GPIO
DIO_14 20 I/O Digital GPIO
DIO_15 21 I/O Digital GPIO
DIO_16 26 I/O Digital GPIO, JTAG_TDO, high-drive capability
DIO_17 27 I/O Digital GPIO, JTAG_TDI, high-drive capability
DIO_18 28 I/O Digital GPIO
DIO_19 29 I/O Digital GPIO
DIO_20 30 I/O Digital GPIO
DIO_21 31 I/O Digital GPIO
DIO_22 32 I/O Digital GPIO
DIO_23 36 I/O Digital or Analog GPIO, analog capability
DIO_24 37 I/O Digital or Analog GPIO, analog capability
DIO_25 38 I/O Digital or Analog GPIO, analog capability
DIO_26 39 I/O Digital or Analog GPIO, analog capability
DIO_27 40 I/O Digital or Analog GPIO, analog capability
DIO_28 41 I/O Digital or Analog GPIO, analog capability
DIO_29 42 I/O Digital or Analog GPIO, analog capability
DIO_30 43 I/O Digital or Analog GPIO, analog capability
EGP — — GND Ground – exposed ground pad
(3)
JTAG_TMSC 24 I/O Digital JTAG TMSC, high-drive capability
JTAG_TCKC 25 I Digital JTAG TCKC
RESET_N 35 I Digital Reset, active low. No internal pullup resistor
RF_P 1 — RF
Positive RF input signal to LNA during RX
Positive RF output signal from PA during TX
RF_N 2 — RF
Negative RF input signal to LNA during RX
Negative RF output signal from PA during TX