Parts List/Tune Up Info
28
CC2642R
SWRS194G –JANUARY 2018 – REVISED APRIL 2020
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Specifications
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5.13.4 Comparators
(1) The comparator can use an internal 8 bits DAC as its reference. The DAC output voltage range depends on the reference voltage
selected. See Table 5-11
Table 5-14. Low-Power Clocked Comparator
T
c
=25°C,V
DDS
= 3.0 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range 0V
DDS
V
Clock frequency SCLK_LF
Internal reference voltage
(1)
Using internal DAC with VDDS as reference voltage,
DAC code = 0 - 255
0.024 - 2.865 V
Offset Measured at V
DDS
/ 2, includes error from internal DAC ±5 mV
Decision time Step from –50 mV to 50 mV 1
Clock
Cycle
(1) The input voltages can be generated externally and connected throughout I/Os or an internal reference voltage can be generated using
the DAC
Table 5-15. Continuous Time Comparator
T
c
=25°C,V
DDS
= 3.0 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range
(1)
0V
DDS
V
Offset Measured at V
DDS
/2 ±5 mV
Decision time Step from –10 mV to 10 mV 0.78 μs
Current consumption Internal reference 8.6 μA
5.13.5 Current Source
Table 5-16. Programmable Current Source
T
c
=25°C,V
DDS
= 3.0 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Current source programmable output range (logarithmic
range)
0.25 - 20 μA
Resolution 0.25 μA