Parts List/Tune Up Info

22
CC2642R
SWRS194G –JANUARY 2018 – REVISED APRIL 2020 www.ti.com
Submit Documentation Feedback
Product Folder Links: CC2642R
Specifications
Copyright © 2018–2020, Texas Instruments Incorporated
5.13 Peripheral Characteristics
5.13.1 ADC
(1) Using IEEE Std 1241-2010 for terminology and test methods
(2) Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V
(3) No missing codes
(4) ADC_output = Ȉ(4
n
samples ) >> n, n = desired extra bits
(5) Applied voltage must be within Absolute Maximum Ratings (see Section 5.1 ) at all times
Table 5-10. Analog-to-Digital Converter (ADC) Characteristics
T
c
=25°C,V
DDS
= 3.0 V and voltage scaling enabled, unless otherwise noted.
(1)
Performance numbers require use of offset and gain adjustements in software by TI-provided ADC drivers.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range 0 VDDS V
Resolution 12 Bits
Sample Rate 200 ksps
Offset Internal 4.3 V equivalent reference
(2)
–0.24 LSB
Gain error Internal 4.3 V equivalent reference
(2)
7.14 LSB
DNL
(3)
Differential nonlinearity >–1 LSB
INL Integral nonlinearity ±4 LSB
ENOB Effective number of bits
Internal 4.3 V equivalent reference
(2)
, 200 kSamples/s,
9.6 kHz input tone
9.8
Bits
Internal 4.3 V equivalent reference
(2)
, 200 kSamples/s,
9.6 kHz input tone, DC/DC enabled
9.8
VDDS as reference, 200 kSamples/s, 9.6 kHz input tone 10.1
Internal reference, voltage scaling disabled,
32 samples average, 200 kSamples/s, 300 Hz input tone
11.1
Internal reference, voltage scaling disabled,
14-bit mode, 200 kSamples/s, 300 Hz input tone
(4)
11.3
Internal reference, voltage scaling disabled,
15-bit mode, 200 kSamples/s, 300 Hz input tone
(4)
11.6
THD Total harmonic distortion
Internal 4.3 V equivalent reference
(2)
, 200 kSamples/s,
9.6 kHz input tone
–65
BitsVDDS as reference, 200 kSamples/s, 9.6 kHz input tone –70
Internal reference, voltage scaling disabled,
32 samples average, 200 kSamples/s, 300 Hz input tone
–72
SINAD,
SNDR
Signal-to-noise
and
distortion ratio
Internal 4.3 V equivalent reference
(2)
, 200 kSamples/s,
9.6 kHz input tone
60
dBVDDS as reference, 200 kSamples/s, 9.6 kHz input tone 63
Internal reference, voltage scaling disabled,
32 samples average, 200 kSamples/s, 300 Hz input tone
68
SFDR Spurious-free dynamic range
Internal 4.3 V equivalent reference
(2)
, 200 kSamples/s,
9.6 kHz input tone
70
dBVDDS as reference, 200 kSamples/s, 9.6 kHz input tone 73
Internal reference, voltage scaling disabled,
32 samples average, 200 kSamples/s, 300 Hz input tone
75
Conversion time Serial conversion, time-to-output, 24 MHz clock 50 Clock Cycles
Current consumption Internal 4.3 V equivalent reference
(2)
0.42 mA
Current consumption VDDS as reference 0.6 mA
Reference voltage
Equivalent fixed internal reference (input voltage scaling
enabled). For best accuracy, the ADC conversion should be
initiated through the TI-RTOS API in order to include the
gain/offset compensation factors stored in FCFG1
4.3
(2) (5)
V
Reference voltage
Fixed internal reference (input voltage scaling disabled). For
best accuracy, the ADC conversion should be initiated through
the TI-RTOS API in order to include the gain/offset
compensation factors stored in FCFG1. This value is derived
from the scaled value (4.3 V) as follows:
V
ref
= 4.3 V × 1408 / 4095
1.48 V
Reference voltage VDDS as reference, input voltage scaling enabled VDDS V