User Manual

5
DDR4 WHITE PAPER
Reduced Power Consumption
Power consumption is improved in multiple ways. First, there’s a baseline 20% reduction in
the voltage required to operate DDR4. While DDR3 requires 1.5V and DDR3L reduced this
requirement to 1.35V, DDR4 starts at 1.2V and is expected to receive a lower specification in
the future that further decreases operating power.
Beyond that, DDR4 introduces additional power-saving technologies. DDR3 operates
at a single universal voltage specification that then has to be scaled internally for some
operations. Increasing voltage internally generates heat, draws more power, and is
generally less ecient. DDR4 features a secondary voltage specification, V
PP
, operating at
2.5V. Instead of losing eciency by having to scale voltage, DDR4 has the needed voltage
available from the start.
DDR4 also adds multiple new refresh methods designed to reduce operating and idle
power consumption, and timings can be adjusted depending on DIMM temperature
to improve eciency and stability. This is more of a means of improving stability than
eciency, and while it won’t be implemented on standard UDIMMs, we can expect to see
this on RDIMMs and SODIMMs.
The DDR4 specification allows for more finely grained control over power to the memory
itself. DDR3’s method of VDDQ termination, dubbed center tapped termination or CTT,
resulted in unused areas of memory still receiving power. DDR4 changes that by switching
to PODs, or Pseudo Open Drains, which eectively allows power to simply drain through
unused memory instead of being wasted.
The net result of these changes and additions to the specification is that DDR4 can be as
much as 30% more ecient than DDR3 when operating at the same performance levels.
Increased Density
DDR4’s architecture was specified to allow for considerably higher IC and DIMM densities
than DDR3’s. Mainstream DDR3 DIMMs currently scale to 8GB, but a modified DDR3
specification (Load Reduction DIMM) allows for an increase to 16GB or 32GB DIMMs. This is
unfortunately only visible chiefly on the enterprise side; while AMD’s processors can handle
16GB DIMMs, current generation mainstream Intel processors can’t support individual DDR3
DIMMs larger than 8GB.
The limitations of capacity in DDR3 are addressed from several angles in the DDR4
specification, with each contributing to an overall massive improvement in potential
density.
First, while a DDR3 IC is specified for up to eight internal banks, DDR4 doubles this number
to 16 while also organizing them into four addressable bank groups (improving overall
performance and eciency). DDR4 also increases the potential density of the IC itself, all
the way up to 16Gb.