User guide

Parameter Dictionary Parameters
ASCII
DvcNet
MACRO
CAN/ECAT
IDX:SUB
Bank
Type
Description
0xA2
0xA3
0x4A2
0x2261
R*
INT16
Hall Input State. The lower three bits of the returned value give the present state of
the Hall input pins. The Hall state is the value of the Hall lines AFTER the ordering
and inversions specified in the Hall wiring configuration have been applied.
0xA4
0xA5
0x4A4
0x2183
R
U32
Latching Fault Status Register. Bit-mapped to show which latching faults have
occurred in the drive. When a latching fault has occurred, the fault bit (bit 22) of the
Drive Event Status Register (0xA0) is set. The cause of the fault can be read from
this register.
To clear a fault condition, write a 1 to the associated bit in this register. The events
that cause the drive to latch a fault are programmable. See Fault Mask (0xA7) for
details.
Latched Faults
Bits
Fault Description
0
Data flash CRC failure. This fault is considered fatal and cannot be cleared.
1
Drive internal error. This fault is considered fatal and cannot be cleared.
2
Short circuit.
3
Drive over temperature.
4
Motor over temperature.
5
Over voltage.
6 Under voltage.
7
Feedback fault.
8
Phasing error.
9
Tracking error.
10
Current limited by I
2
T algorithm.
11
FPGA error type 1.
12
Command input lost.
13
FPGA error type 2.
14 Safety circuit fault.
15
Unable to control current.
16
Motor wiring disconnected (see Open Motor Wiring Check Current (0x19D)).
17-31
Reserved.
0xA5
0xA6
0x4A5
0x2191
RF
U16
Input Pin Configuration Register. Some drives have one or more pull-up resistors
associated with their general-purpose input pins. On these drives, the state of the
pull-ups can be controlled by writing to this register.
Copley Controls Page 33