User`s guide

Cumulative Ambi

uity Hazard 16

-9

Another cause of cumulative ambiguity hazard involves circuits

with asynchronous feedback. The simulation of such circuits

under worst-case timing constraints yields an overly pessimistic

result due to the unbounded accumulation of ambiguity in the

feedback path. A simple example of this effect is shown in

Figure 16-10.

ure 16-10

Cumulative Ambiguity Hazard Example 3

Due to the accumulation of ambiguity in the loop, the output

signal will eventually become X, because the ambiguities of the

rising and falling edges overlap. However, in the hardware

realization of this circuit, a continuous phase shift with respect

to absolute time is what will actually occur (assuming normal

deviations of the rise and fall delays from the nominal values).

If this signal were used to clock another circuit, it becomes the

reference and the effects of the phase shift may be ignored. This

can be accomplished in the simulation by setting the NAND

gate’s model parameter, MNTYMXDLY=2 to utilize typical

delay values for that one gate only (all other devices continue to

operate in worst-case mode).

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