User`s guide

14
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32 Di
g
ital Simulation
Table 14-5
Simulation Condition Messages—Hazards
Message Type
Severity
Level
Meaning
AMBIGUITY
CONVERGENCE
WARNING Convergence of conflicting rising and falling states (timing ambiguities)
arrived at the inputs of a primitive and produced a pulse (glitch) on the
output. See
Chapter 16,
Digital Worst-Case Timing Analysis
for
more information.
CUMULATIVE
AMBIGUITY
WARNING Signal ambiguities are additive, increased by propagation through each level
of logic in the circuit. The ambiguities associated with both edges of a pulse
increased to the point where they overlapped, which PSpice A/D reports as a
cumulative ambiguity hazard. See Chapter 16,
Digital Worst-Case
Timing Analysis
for more information.
SUPPRESSED
GLITCH
WARNING Pulse applied to the input of a primitive that is shorter than the active
propagation delay was ignored by PSpice A/D; significance depends on the
nature of the circuit. There might be a problem either with the stimulus, or
with the path delay configuration of the circuit. See Chapter 16,
Digital
Worst-Case Timing Analysis
for more information.
NET-STATE
CONFLICT
WARNING Two or more outputs attempted to drive a net to different states, which
PSpice A/D reports as an X (unknown) state. This usually results from
improper selection of a bus driver’s enable inputs.
ZERO-DELAY-
OSCILLATION
FATAL Output of a primitive changed more than 50 times within a single digital time
step. PSpice A/D aborted the run.
DIGITAL INPUT
VOLTAGE
SERIOUS Voltage on a digital pin was out of range, which means PSpice A/D used the
state with a voltage range closest to the input voltage and continued the
simulation.
PERSISTENT
HAZARD
SERIOUS Effects of any of the aforementioned logic hazards were able to propagate to
either an external port or to any storage device in the circuit. See
Persistent
hazards on page 14-28
for more information.