User`s guide

28 Monte Carlo and Sensitivity/Worst-Case Analyses

Worst-Case Anal

sis Example

The schematic shown in Figure 13-12 is for an amplifier circuit

which is a biased BJT. This circuit is used to demonstrate how a

simple worst-case analysis works. It also shows how non-

monotonic dependence of the output on a single parameter can

adversely affect the worst-case analysis. Since an AC (small-

signal) analysis is being performed, setting the input to unity

means that the output, Vm([OUT]), is the magnitude of the gain

of the amplifier. The only variable declared in this circuit is the

resistance of Rb2. Since the value of Rb2 determines the bias on

the BJT, it also affects the amplifier’s gain.

Figure 13-14 is the circuit file used to run either a parametric

analysis (.STEP, shown enabled in the circuit file) that sets the

value of resistor Rb2 by stepping model parameter R through

values spanning the specified DEV tolerance range, or a worst-

case analysis (shown disabled in the circuit file) that allows

PSpice A/D to determine the worst-case value for parameter R

based upon a sensitivity analysis. PSpice A/D allows only one

of these analyses to be run in any given simulation. Note that the

AC and worst-case analysis specifications (.AC and .WC

statements) are written so that the worst-case analysis tries to

minimize Vm([OUT]) at 100 kHz.

The netlist and circuit file in Figure 13-14 is set up to run either

a parametric (.STEP) or worst-case (.WC) analysis of the

specified AC analysis. These simulations demonstrate the

ure 13-12

Simple Biased BJT Amplifier