User`s guide

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Up Analyses 8

-5

Output Variables

Certain analyses (such as noise, Monte Carlo, sensitivity/worst-

case, DC sensitivity, Fourier, and small-signal DC transfer

function) require you to specify output variables for voltages

and currents at specific points on the schematic. Depending

upon the analysis type, you may need to specify the following:

• voltage on a net, a pin, or at a terminal of a semiconductor

device

• current through a part or into a terminal of a semiconductor

device

• a device name

If output variables or other information are required, a dialog

box is displayed when you click on the button for the analysis

type in the Analysis Setup dialog box.

Volta

Specify voltage in the following format:

v[modifiers](<out id>[,<out id>]) (1)

where <out id > is:

<net id> or <pin id>(2)

<net id> is a fully qualified net name (3)

<pin id> is <fully qualified device name>:<pin name>(4)

A fully qualified net name (as referred to in line 3 above) is

formed by prefixing the visible net name (from a label applied

to one of the segments of a wire or bus, or an offpage port

connected to the net) with the full hierarchical path, separated by

periods. At the top level of hierarchy, this is just the visible

name.

A fully qualified device name (from line 4 above) is

distinguished by specifying the full hierarchical path followed

by the device’s reference designator, separated by period

characters. For example, a resistor with reference designator

R34 inside part Y1 placed on a top-level page is referred to as

Y1.R34 when used in an output variable.