User`s guide
7
-
24 Di
g
ital Device Modelin
g
and output leakage currents would be required, as well as low
coupling from adjacent signals.
The simulator models the stored charge nets using a simplified
switch-level simulation technique. A normalized (with respect to
power supply) charge or discharge current is calculated for each
output or transfer gate attached to the net. This current, divided
by the net’s total capacitance, is integrated and recalculated at
intervals which are appropriate for the particular net. The net’s
digital level is determined by the normalized voltage on the net.
Only the digital level (1, 0, R, F, X) on the net is used by device
inputs attached to the net.
This technique allows accurate simulation of networks of
transfer gates and capacitive loads. The sharing of charge among
several nets which are connected by transfer gates is handled
properly because the simulation method calculates the charge
transferred between the nets, and maintains a floating-point
value for the charge on the net (not just a one or zero). Because
of the increased computation, it takes the simulator longer to
simulate charge storage nets than normal digital nets. However,
charge storage nets are simulated much faster than analog nets.
The I/O Model parameters INR, DRVZ, and TSTOREMN (see
Table 7-2 on page 7-19
) are used by the simulator to determine
which nets should be simulated as charge storage nets. The
simulator will simulate charge storage only for a net which has
some devices attached to it which can be high impedance (Z),
and which has a storage time greater than or equal to the smallest
TSTOREMN of all inputs attached to the net. The storage time
is calculated as the total capacitance (sum of all INLD and
OUTLD values for attached inputs and outputs) multiplied by
the total leakage resistance for the net (the parallel combination
of all INR and DRVZ values for attached inputs and outputs).
Note
The default values provided by the UIO model will
not allow the use of char
g
e-stora
g
e simulation
techniques—even with circuits usin
g
non-
MicroSim libraries of di
g
ital devices. This is
appropriate, since these libraries are usually for
PCB-based desi
g
ns.