User`s guide

7
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14 Di
g
ital Device Modelin
g
Instead, when one or more timing constraints are omitted, the
simulator uses the following steps to fill in the missing values:
• If the minimum value is omitted, it defaults to zero.
• If the maximum value is omitted, it takes on the typical
value if one was specified, otherwise it takes on the
minimum value.
• If the typical value is omitted, it is computed as the average
of the minimum and maximum values.
Propa
g
ation Dela
y
Calculation
The timing characteristics of digital primitives are determined
by both the Timing Models and the I/O Models. Timing Models
specify propagation delays and timing constraints such as setup
and hold times. I/O Models specify input and output loading,
driving resistances, and switching times.
When a device’s output connects to another digital device, the
total propagation delay through a device is determined by
adding the loading delay (on the output terminal) to the delay
specified in the device’s Timing Model. Loading delay is
calculated from the total load on the output and the device’s
driving resistances. The total load on an output is found by
summing the output and input loads (OUTLD and INLD in the
I/O Model) of all devices connected to that output. This total
load, combined with the device’s driving resistances (DRVL
and DRVH in the I/O Model), allows the loading delay to be
calculated:
Loading delay = R
DRIVE
·C
TOTAL
·ln(2)
The loading delay is calculated for each output terminal of every
device before the simulation begins. The total propagation delay
is easily calculated during the simulation by adding the pre-
calculated loading delay to the device’s timing delay. However,
for any individual timing delay specification (e.g., TPLH)
having a value of 0, the loading delay is not used.