Technical data

CHALLENGE/Onyx Diagnostic Road Map 2-29
4. Check the reset line (pin 20) to the CC chip.
5. If the reset line does not pulse when the SCLR line is enabled, check pin 17 on the A
chip.
6. If the A chip line doesn’t pulse either, check for a failure in the System Controller.
2.5.1.7 LEDs Show Failure Code After Starting Boot Pattern
This procedure assumes that the processor is basically functional. It can fetch and execute
EPROM instructions, but may be having trouble reaching the bus or ASICs beyond the CC
chip.
1. Record the binary LED value and refer to Section 5.7, “CPU Board Fault/Status
Indicators,” for a description of the fault.
2. Check the UART output.
2.5.1.8 The Enable Register Is Incorrect
1. From a working board in the same system, read register 0 on the board under test.
This is done by using the POD command dc <slot number> 0. Register 0 contains the
ENABLE vector, which represents the number of processors populating the board.
For the IP19, the value 0x3 corresponds to two CPUs and 0xf corresponds to four
CPUs. For the IP21, the value 0x3 corresponds to one CPU and 0xf corresponds to two
CPUs.
2. If the register value does not match the number of occupied slices, replace the
CC_SHARED PAL at G0C0.
2.5.1.9 IP19 LEDs Show a Static 0xe Pattern
The serial clock is not running.
1. Look for approximately 100 kHz at pin 20 on the CC chip.
2. If no clock is present, check the System Controller for serial clock generation.
2.5.1.10 IP21 LEDs Show a Static 0x14 Pattern
The serial clock is not running. Diagnose per Section 2.5.1.9, “IP19 LEDs Show a Static 0xe
Pattern.”
2.5.1.11 IP19 LEDs Show a Static 0xc Pattern
System is stuck in bootmaster arbitration. Possible cause is a CC clock problem.
1. Replace the CC chip.
2. Replace the EAROM.